📄 u3copy_to_user.s
字号:
/* $Id: U3copy_to_user.S,v 1.3 2000/11/01 09:29:19 davem Exp $ * U3memcpy.S: UltraSparc-III optimized copy to userspace. * * Copyright (C) 1999, 2000 David S. Miller (davem@redhat.com) */#ifdef __KERNEL__#include <asm/visasm.h>#include <asm/asi.h>#include <asm/dcu.h>#include <asm/spitfire.h>#undef SMALL_COPY_USES_FPU#define EXNV(x,y,a,b) \98: x,y; \ .section .fixup; \ .align 4; \99: retl; \ a, b, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXNV2(x,y,a,b) \98: x,y; \ .section .fixup; \ .align 4; \99: a, b, %o0; \ retl; \ add %o0, 1, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXNV3(x,y,a,b) \98: x,y; \ .section .fixup; \ .align 4; \99: a, b, %o0; \ retl; \ add %o0, 8, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EX(x,y,a,b) \98: x,y; \ .section .fixup; \ .align 4; \99: VISExitHalf; \ retl; \ a, b, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXBLK1(x,y) \98: x,y; \ .section .fixup; \ .align 4; \99: VISExitHalf; \ add %o4, 0x1c0, %o1; \ and %o2, (0x40 - 1), %o2; \ retl; \ add %o1, %o2, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXBLK2(x,y) \98: x,y; \ .section .fixup; \ .align 4; \99: VISExitHalf; \ sll %o3, 6, %o3; \ and %o2, (0x40 - 1), %o2; \ add %o3, 0x80, %o1; \ retl; \ add %o1, %o2, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXBLK3(x,y) \98: x,y; \ .section .fixup; \ .align 4; \99: VISExitHalf; \ and %o2, (0x40 - 1), %o2; \ retl; \ add %o2, 0x80, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#define EXBLK4(x,y) \98: x,y; \ .section .fixup; \ .align 4; \99: VISExitHalf; \ and %o2, (0x40 - 1), %o2; \ retl; \ add %o2, 0x40, %o0; \ .section __ex_table; \ .align 4; \ .word 98b, 99b; \ .text; \ .align 4;#else#define ASI_AIUS 0x80#define ASI_BLK_AIUS 0xf0#define FPRS_FEF 0x04#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs#define SMALL_COPY_USES_FPU#define EXNV(x,y,a,b) x,y;#define EXNV2(x,y,a,b) x,y;#define EXNV3(x,y,a,b) x,y;#define EX(x,y,a,b) x,y;#define EXBLK1(x,y) x,y;#define EXBLK2(x,y) x,y;#define EXBLK3(x,y) x,y;#define EXBLK4(x,y) x,y;#endif /* Special/non-trivial issues of this code: * * 1) %o5 is preserved from VISEntryHalf to VISExitHalf * 2) Only low 32 FPU registers are used so that only the * lower half of the FPU register set is dirtied by this * code. This is especially important in the kernel. * 3) This code never prefetches cachelines past the end * of the source buffer. */ .text .align 32 /* The cheetah's flexible spine, oversized liver, enlarged heart, * slender muscular body, and claws make it the swiftest hunter * in Africa and the fastest animal on land. Can reach speeds * of up to 2.4GB per second. */ .globl U3copy_to_userU3copy_to_user: /* %o0=dst, %o1=src, %o2=len */ /* Writing to %asi is _expensive_ so we hardcode it. * Reading %asi to check for KERNEL_DS is comparatively * cheap. */ rd %asi, %g1 ! MS Group (4 cycles) cmp %g1, ASI_AIUS ! A0 Group bne U3memcpy ! BR nop ! A1#ifndef __KERNEL__ /* Save away original 'dst' for memcpy return value. */ mov %o0, %g3 ! A0 Group#endif /* Anything to copy at all? */ cmp %o2, 0 ! A1 ble,pn %icc, U3copy_to_user_short_ret ! BR /* Extremely small copy? */ cmp %o2, 31 ! A0 Group ble,pn %icc, U3copy_to_user_short ! BR /* Large enough to use unrolled prefetch loops? */ cmp %o2, 0x100 ! A1 bge,a,pt %icc, U3copy_to_user_enter ! BR Group andcc %o0, 0x3f, %g2 ! A0 ba,pt %xcc, U3copy_to_user_toosmall ! BR Group andcc %o0, 0x7, %g2 ! A0 .align 32U3copy_to_user_short: /* Copy %o2 bytes from src to dst, one byte at a time. */ ldub [%o1 + 0x00], %o3 ! MS Group add %o1, 0x1, %o1 ! A0 add %o0, 0x1, %o0 ! A1 subcc %o2, 1, %o2 ! A0 Group bg,pt %icc, U3copy_to_user_short ! BR EXNV(stba %o3, [%o0 + -1] %asi, add %o2, 1) ! MS Group (1-cycle stall)U3copy_to_user_short_ret:#ifdef __KERNEL__ retl ! BR Group (0-4 cycle stall) clr %o0 ! A0#else retl ! BR Group (0-4 cycle stall) mov %g3, %o0 ! A0#endif /* Here len >= (6 * 64) and condition codes reflect execution * of "andcc %o0, 0x7, %g2", done by caller. */ .align 64U3copy_to_user_enter: /* Is 'dst' already aligned on an 64-byte boundary? */ be,pt %xcc, 2f ! BR /* Compute abs((dst & 0x3f) - 0x40) into %g2. This is the number * of bytes to copy to make 'dst' 64-byte aligned. We pre- * subtract this from 'len'. */ sub %g2, 0x40, %g2 ! A0 Group sub %g0, %g2, %g2 ! A0 Group sub %o2, %g2, %o2 ! A0 Group /* Copy %g2 bytes from src to dst, one byte at a time. */1: ldub [%o1 + 0x00], %o3 ! MS (Group) add %o1, 0x1, %o1 ! A1 add %o0, 0x1, %o0 ! A0 Group subcc %g2, 0x1, %g2 ! A1 bg,pt %icc, 1b ! BR Group EXNV2(stba %o3, [%o0 + -1] %asi, add %o2, %g2) ! MS Group2: VISEntryHalf ! MS+MS and %o1, 0x7, %g1 ! A1 ba,pt %xcc, U3copy_to_user_begin ! BR alignaddr %o1, %g0, %o1 ! MS (Break-after) .align 64U3copy_to_user_begin:#ifdef __KERNEL__ .globl U3copy_to_user_nop_1_6U3copy_to_user_nop_1_6: ldxa [%g0] ASI_DCU_CONTROL_REG, %g3 sethi %uhi(DCU_PE), %o3 sllx %o3, 32, %o3 or %g3, %o3, %o3 stxa %o3, [%g0] ASI_DCU_CONTROL_REG ! Enable P-cache membar #Sync#endif prefetch [%o1 + 0x000], #one_read ! MS Group1 prefetch [%o1 + 0x040], #one_read ! MS Group2 andn %o2, (0x40 - 1), %o4 ! A0 prefetch [%o1 + 0x080], #one_read ! MS Group3 cmp %o4, 0x140 ! A0 prefetch [%o1 + 0x0c0], #one_read ! MS Group4 ldd [%o1 + 0x000], %f0 ! MS Group5 (%f0 results at G8) bge,a,pt %icc, 1f ! BR prefetch [%o1 + 0x100], #one_read ! MS Group61: ldd [%o1 + 0x008], %f2 ! AX (%f2 results at G9) cmp %o4, 0x180 ! A1 bge,a,pt %icc, 1f ! BR prefetch [%o1 + 0x140], #one_read ! MS Group71: ldd [%o1 + 0x010], %f4 ! AX (%f4 results at G10) cmp %o4, 0x1c0 ! A1 bge,a,pt %icc, 1f ! BR prefetch [%o1 + 0x180], #one_read ! MS Group81: faligndata %f0, %f2, %f16 ! FGA Group9 (%f16 at G12) ldd [%o1 + 0x018], %f6 ! AX (%f6 results at G12) faligndata %f2, %f4, %f18 ! FGA Group10 (%f18 results at G13) ldd [%o1 + 0x020], %f8 ! MS (%f8 results at G13) faligndata %f4, %f6, %f20 ! FGA Group12 (1-cycle stall,%f20 at G15) ldd [%o1 + 0x028], %f10 ! MS (%f10 results at G15) faligndata %f6, %f8, %f22 ! FGA Group13 (%f22 results at G16) ldd [%o1 + 0x030], %f12 ! MS (%f12 results at G16) faligndata %f8, %f10, %f24 ! FGA Group15 (1-cycle stall,%f24 at G18) ldd [%o1 + 0x038], %f14 ! MS (%f14 results at G18) faligndata %f10, %f12, %f26 ! FGA Group16 (%f26 results at G19) ldd [%o1 + 0x040], %f0 ! MS (%f0 results at G19)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -