📄 stm8l15x_clk.c
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from LSE to LSI.
@endverbatim
* @{
*/
/**
* @brief Enables the clock CSS on LSE.
* @note Once Enabled, only POR can Disable it.
* @param None
* @retval None
*/
void CLK_LSEClockSecuritySystemEnable(void)
{
/* Set CSSEN bit */
CSSLSE->CSR |= CSSLSE_CSR_CSSEN;
}
/**
* @brief Enables RTC clock switch to LSI in case of LSE failure.
* @note Once Enabled, only POR can Disable it.
* @param None
* @retval None
*/
void CLK_RTCCLKSwitchOnLSEFailureEnable(void)
{
/* Set SWITCHEN bit */
CSSLSE->CSR |= CSSLSE_CSR_SWITCHEN;
}
/**
* @}
*/
/** @defgroup CLK_Group5 Low power clock configuration functions
* @brief Low power clock configuration functions
*
@verbatim
===============================================================================
Low power clock configuration functions
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Configures clock during halt and active halt modes.
* @param CLK_Halt : Specifies the clock state and wake-up mode from halt way.
* This parameter can be a value of @ref CLK_Halt_TypeDef.
* @param NewState : Specifies the System clock (SYSCLK) state in active halt mode.
* This parameter can be ENABLE or DISABLE.
* @retval None
*/
void CLK_HaltConfig(CLK_Halt_TypeDef CLK_Halt, FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_CLK_HALT(CLK_Halt));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
CLK->ICKCR |= (uint8_t)(CLK_Halt);
}
else
{
CLK->ICKCR &= (uint8_t)(~CLK_Halt);
}
}
/**
* @brief Configures the main voltage regulator
* @param NewState: specifies the MVR state.
* This parameter can be one of the following values:
* - DISABLE: MVR disabled;
* - ENABLE: MVR enabled.
* @retval None
*/
void CLK_MainRegulatorCmd(FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Reset REGUOFF bit */
CLK->REGCSR &= (uint8_t)(~CLK_REGCSR_REGOFF);
}
else
{
/* Set REGUOFF bit */
CLK->REGCSR |= CLK_REGCSR_REGOFF;
}
}
/**
* @}
*/
/** @defgroup CLK_Group6 Interrupts and flags management functions
* @brief Interrupts and flags management functions
*
@verbatim
===============================================================================
Interrupts and flags management functions
===============================================================================
@endverbatim
* @{
*/
/**
* @brief Enables or disables the specified CLK interrupts.
* @param CLK_IT: specifies the CLK interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values:
* @arg CLK_IT_CSSD: Clock security system detection interrupt
* @arg CLK_IT_SWIF: Clock switch interrupt
* @arg CLK_IT_LSECSSF: LSE Clock security system detection interrupt
* @param NewState: new state of the specified CLK interrupts.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState)
{
/* check the parameters */
assert_param(IS_CLK_IT(CLK_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
if (CLK_IT == CLK_IT_SWIF)
{
/* Enable the clock switch interrupt */
CLK->SWCR |= CLK_SWCR_SWIEN;
}
else if (CLK_IT == CLK_IT_LSECSSF)
{
/* Enable the CSS on LSE interrupt */
CSSLSE->CSR |= CSSLSE_CSR_CSSIE;
}
else
{
/* Enable the clock security system detection interrupt */
CLK->CSSR |= CLK_CSSR_CSSDIE;
}
}
else /*(NewState == DISABLE)*/
{
if (CLK_IT == CLK_IT_SWIF)
{
/* Disable the clock switch interrupt */
CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIEN);
}
else if (CLK_IT == CLK_IT_LSECSSF)
{
/* Disable the CSS on LSE interrupt */
CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSIE);
}
else
{
/* Disable the clock security system detection interrupt */
CLK->CSSR &= (uint8_t)(~CLK_CSSR_CSSDIE);
}
}
}
/**
* @brief Checks whether the specified CLK flag is set or not.
* @param CLK_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* @arg CLK_FLAG_LSIRDY: LSI oscillator clock ready
* @arg CLK_FLAG_HSIRDY: HSI oscillator clock ready
* @arg CLK_FLAG_HSERDY: HSE oscillator clock ready
* @arg CLK_FLAG_SWBSY: Switch busy
* @arg CLK_FLAG_CSSD: Clock security system detection
* @arg CLK_FLAG_AUX: Auxiliary oscillator connected to master clock
* @arg CLK_FLAG_LSERDY: LSE oscillator clock ready
* @arg CLK_FLAG_CCOBSY: Configurable clock output busy
* @arg CLK_FLAG_RTCSWBSY: RTC clock busy in switch
* @arg CLK_FLAG_EEREADY: Flash program memory and Data EEPROM ready
* @arg CLK_FLAG_EEBUSY: Flash program memory and Data EEPROM busy
* @arg CLK_FLAG_LSEPD: LSE power-down
* @arg CLK_FLAG_LSIPD: LSI power-down
* @arg CLK_FLAG_HSEPD: HSE power-down
* @arg CLK_FLAG_HSIPD: HSI power-down
* @arg CLK_FLAG_REGREADY: REGREADY
* @arg CLK_FLAG_BEEPSWBSY: BEEP clock busy in switch
* @arg CLK_FLAG_LSECSSF: CSS on LSE detection
* @arg CLK_FLAG_RTCCLKSWF: RTCCLK switch completed on LSE failure
* @retval The new state of CLK_FLAG (SET or RESET).
*/
FlagStatus CLK_GetFlagStatus(CLK_FLAG_TypeDef CLK_FLAG)
{
uint8_t reg = 0;
uint8_t pos = 0;
FlagStatus bitstatus = RESET;
/* check the parameters */
assert_param(IS_CLK_FLAGS(CLK_FLAG));
/* get flag register */
reg = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0xF0);
/* get flag position */
pos = (uint8_t)((uint8_t)CLK_FLAG & (uint8_t)0x0F);
if (reg == 0x00) /* The flag to check is in CRTC Rregister */
{
reg = CLK->CRTCR;
}
else if (reg == 0x10) /* The flag to check is in ICKCR register */
{
reg = CLK->ICKCR;
}
else if (reg == 0x20) /* The flag to check is in CCOR register */
{
reg = CLK->CCOR;
}
else if (reg == 0x30) /* The flag to check is in ECKCR register */
{
reg = CLK->ECKCR;
}
else if (reg == 0x40) /* The flag to check is in SWCR register */
{
reg = CLK->SWCR;
}
else if (reg == 0x50) /* The flag to check is in CSSR register */
{
reg = CLK->CSSR;
}
else if (reg == 0x70) /* The flag to check is in REGCSR register */
{
reg = CLK->REGCSR;
}
else if (reg == 0x80) /* The flag to check is in CSSLSE_CSRregister */
{
reg = CSSLSE->CSR;
}
else /* The flag to check is in CBEEPR register */
{
reg = CLK->CBEEPR;
}
if ((reg & (uint8_t)((uint8_t)1 << (uint8_t)pos)) != (uint8_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return((FlagStatus)bitstatus);
}
/**
* @brief Clears the CSS LSE Flag.
* @param None
* @retval None
*/
void CLK_ClearFlag(void)
{
/* Clear the clock security system on LSE detection Flag */
CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
}
/**
* @brief Checks whether the specified CLK interrupt has occurred or not.
* @param CLK_IT: specifies the CLK interrupt source to check.
* This parameter can be one of the following values:
* @arg CLK_IT_SWIF: LSI ready interrupt
* @arg CLK_IT_LSECSSF: LSE ready interrupt
* @arg CLK_IT_CSSD: HSI ready interrupt
* @retval The new state of CLK_IT (SET or RESET).
*/
ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT)
{
ITStatus bitstatus = RESET;
/* check the parameters */
assert_param(IS_CLK_IT(CLK_IT));
if (CLK_IT == CLK_IT_SWIF)
{
/* Check the status of the clock switch interrupt */
if ((CLK->SWCR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
else if (CLK_IT == CLK_IT_LSECSSF)
{
/* Check the status of the clock security system on LSE interrupt */
if ((CSSLSE->CSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
else /* CLK_IT == CLK_IT_CSSD */
{
/* Check the status of the security system detection interrupt */
if ((CLK->CSSR & (uint8_t)CLK_IT) == (uint8_t)0x0C)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
/* Return the CLK_IT status */
return bitstatus;
}
/**
* @brief Clears the CLK's interrupt pending bits.
* @param CLK_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* @arg CLK_IT_SWIF: Clock switch interrupt
* @arg CLK_IT_LSECSSF: LSE Clock security system detection interrupt
* @retval None
*/
void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT)
{
/* check the parameters */
assert_param(IS_CLK_CLEAR_IT(CLK_IT));
if ((uint8_t)((uint8_t)CLK_IT & (uint8_t)0xF0) == (uint8_t)0x20)
{
/* Clear the status of the clock security system on LSE interrupt */
CSSLSE->CSR &= (uint8_t)(~CSSLSE_CSR_CSSF);
}
else
{
/* Clear the status of the clock switch interrupt */
CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWIF);
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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