stm8l15x_clk.c

STM8L的tim4定时器使用

  1. Several clock sources can be used to drive the System clock (SYSCLK): HSI,
     HSE, LSI and LSE.
     You can use "CLK_GetClocksFreq()" function to retrieve the frequencies of these clocks.  

@note All the peripheral clocks are derived from the System clock (SYSCLK) except:
       - BEEP: the Beeper clock can be derived either from a LSE or LSI clock sources. 
          You have to use CLK_BEEPClockConfig() function to configure this clock. 
       - RTC: the RTC clock can be derived either from the LSI, LSE, HSI or HSE clock
          divided by 1 to 64. You have to use CLK_RTCClockConfig() functions to 
          configure this clock.
       - LCD : LCD clock is the RTC Clock divided by 2. 
       - IWDG clock which is always the LSI clock.
       
  2. The maximum frequency of the SYSCLK is 16 MHz.

@endverbatim
  * @{
  */
  
/**
  * @brief  Configures the system clock (SYSCLK).
  * @note   The HSI is used (enabled by hardware) as system clock source after
  *         startup from Reset, wake-up from Halt and active Halt modes, or in case
  *         of failure of the HSE used as system clock (if the Clock Security System CSS is enabled).
  * @note   A switch from one clock source to another occurs only if the target
  *         clock source is ready (clock stable after startup delay or PLL locked). 
  *         You can use CLK_GetSYSCLKSource() function to know which clock is
  *         currently used as system clock source. 
  * @param  CLK_SYSCLKSource: specifies the clock source used as system clock.
  *          This parameter can be one of the following values:
  *            @arg CLK_SYSCLKSource_HSI: HSI selected as system clock source
  *            @arg CLK_SYSCLKSource_HSE: HSE selected as system clock source
  *            @arg CLK_SYSCLKSource_LSI: LSI selected as system clock source
  *            @arg CLK_SYSCLKSource_LSE: LSE selected as system clock source
  * @retval None
  */
void CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_TypeDef CLK_SYSCLKSource)
{
  /* check teh parameters */
  assert_param(IS_CLK_SOURCE(CLK_SYSCLKSource));

  /* Selection of the target clock source */
  CLK->SWR = (uint8_t)CLK_SYSCLKSource;
}

/**
  * @brief  Returns the clock source used as system clock.
  * @param  None
  * @retval Clock used as System clock (SYSCLK) source.
  *         The returned value can be one of the following:
  *         - CLK_SYSCLKSource_HSI: HSI used as system clock
  *         - CLK_SYSCLKSource_LSI: LSI used as system clock
  *         - CLK_SYSCLKSource_HSE: HSE used as system clock
  *         - CLK_SYSCLKSource_LSE: LSE used as system clock
  */
CLK_SYSCLKSource_TypeDef CLK_GetSYSCLKSource(void)
{
  return ((CLK_SYSCLKSource_TypeDef)(CLK->SCSR));
}

/**
  * @brief  Returns the frequencies of different the SYSCLK
  * 
  * @note   The system frequency computed by this function is not the real 
  *         frequency in the chip. It is calculated based on the predefined 
  *         constant and the selected clock source:
  * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
  * @note     If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
  * @note     If SYSCLK source is LSE, function returns values based on LSE_VALUE(***) 
  * @note     If SYSCLK source is LSI, function returns values based on LSI_VALUE(****)
  * @note     (*) HSI_VALUE is a constant defined in stm8l15x.h file (default value
  *               16 MHz) but the real value may vary depending on the variations
  *               in voltage and temperature.
  * @note     (**) HSE_VALUE is a constant defined in stm8l15x.h file (default value
  *                16 MHz), user has to ensure that HSE_VALUE is same as the real
  *                frequency of the crystal used. Otherwise, this function may
  *                have wrong result.
  * @note     (***) LSI_VALUE is a constant defined in stm8l15x.h file (default value
  *               38 KHz) but the real value may vary depending on the variations
  *               in voltage and temperature.
  * @note     (****) LSE_VALUE is a constant defined in stm8l15x.h file (default value
  *                32,768 KHz), user has to ensure that LSE_VALUE is same as the real
  *                frequency of the crystal used. Otherwise, this function may
  *                have wrong result.
  *
  * @note   The result of this function could be not correct when using fractional
  *         value for HSE crystal.
  *   
  * @param  None
  *
  * @note   This function can be used by the user application to compute the 
  *         baudrate for the communication peripherals or configure other parameters.
  * @note   Each time SYSCLK clock changes, this function must be called to update
  *         the returned value. Otherwise, any configuration based on this 
  *         function will be incorrect.
  *
  * @retval System Clock frequency value
  */
uint32_t CLK_GetClockFreq(void)
{
  uint32_t clockfrequency = 0;
  uint32_t sourcefrequency = 0;
  CLK_SYSCLKSource_TypeDef clocksource = CLK_SYSCLKSource_HSI;
  uint8_t tmp = 0, presc = 0;

  /* Get SYSCLK source. */
  clocksource = (CLK_SYSCLKSource_TypeDef)CLK->SCSR;

  if ( clocksource == CLK_SYSCLKSource_HSI)
  {
    sourcefrequency = HSI_VALUE;
  }
  else if ( clocksource == CLK_SYSCLKSource_LSI)
  {
    sourcefrequency = LSI_VALUE;
  }
  else if ( clocksource == CLK_SYSCLKSource_HSE)
  {
    sourcefrequency = HSE_VALUE;
  }
  else
  {
    clockfrequency = LSE_VALUE;
  }

  /* Get System clock divider factor*/
  tmp = (uint8_t)(CLK->CKDIVR & CLK_CKDIVR_CKM);
  presc = SYSDivFactor[tmp];

  /* Get System clock clcok frequency */
  clockfrequency = sourcefrequency / presc;

  return((uint32_t)clockfrequency);
}

/**
  * @brief  Configures the System clock (SYSCLK) dividers.
  * @param  CLK_SYSCLKDiv : Specifies the system clock divider to apply.
  *          This parameter can be one of the following values:
  *            @arg CLK_SYSCLKDiv_1 
  *            @arg CLK_SYSCLKDiv_2
  *            @arg CLK_SYSCLKDiv_4
  *            @arg CLK_SYSCLKDiv_8
  *            @arg CLK_SYSCLKDiv_16
  *            @arg CLK_SYSCLKDiv_64
  *            @arg CLK_SYSCLKDiv_128
  * @retval None
  */
void CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_TypeDef CLK_SYSCLKDiv)
{
  /* check the parameters */
  assert_param(IS_CLK_SYSTEM_DIVIDER(CLK_SYSCLKDiv));

  CLK->CKDIVR = (uint8_t)(CLK_SYSCLKDiv);
}

/**
  * @brief  Enables or disables the clock switch execution.
  * @param  NewState : new state of clock switch, value accepted ENABLE, DISABLE.
  * @retval None
  */
void CLK_SYSCLKSourceSwitchCmd(FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Set SWEN bit */
    CLK->SWCR |= CLK_SWCR_SWEN;
  }
  else
  {
    /* Reset SWEN  bit */
    CLK->SWCR &= (uint8_t)(~CLK_SWCR_SWEN);
  }
}

/**
  * @}
  */

/** @defgroup CLK_Group3 Peripheral clocks configuration functions
 *  @brief   Peripheral clocks configuration functions 
 *
@verbatim   
 ===============================================================================
                   Peripheral clocks configuration functions
 ===============================================================================  

  This section provides functions allowing to configure the Peripheral clocks. 
  
  1. The RTC clock which is derived from the LSI, LSE, HSI or HSE clock divided by 1 to 64.
     
  2. The BEEP clock which is derived from the LSI or LSE clocks.

  3. After restart from Reset or wakeup from HALT, all peripherals are off
     Before to start using a peripheral you have to enable its interface clock. 
     You can do this using CLK_AHBPeriphClockCmd()
     , CLK_APB2PeriphClockCmd() and CLK_APB1PeriphClockCmd() functions.
     
  4. To reset the peripherals configuration (to the default state after device reset)
     you can use CLK_PeripheralClockConfig() function.  

@endverbatim
  * @{
  */

/**
  * @brief  Configures the RTC clock (RTCCLK).
  * @param  CLK_RTCCLKSource: specifies the RTC clock source.
  *          This parameter can be one of the following values:
  *            @arg CLK_RTCCLKSource_Off: RTC clock Off  
  *            @arg CLK_RTCCLKSource_LSE: LSE selected as RTC clock
  *            @arg CLK_RTCCLKSource_LSI: LSI selected as RTC clock
  *            @arg CLK_RTCCLKSource_HSE: HSE selected as RTC clock
  *            @arg CLK_RTCCLKSource_HSI: HSI selected as RTC clock  
  *  
  * @param  CLK_RTCCLKDiv: specifies the RTC clock source divider.
  *          This parameter can be one of the following values:
  *            @arg CLK_RTCCLKDiv_1: Clock RTC Div 1  
  *            @arg CLK_RTCCLKDiv_2: Clock RTC Div 2
  *            @arg CLK_RTCCLKDiv_4: Clock RTC Div 4
  *            @arg CLK_RTCCLKDiv_8: Clock RTC Div 8
  *            @arg CLK_RTCCLKDiv_16: Clock RTC Div 16
  *            @arg CLK_RTCCLKDiv_32: Clock RTC Div 32
  *            @arg CLK_RTCCLKDiv_64: Clock RTC Div 64
  *  
  * @note   If the LSE or LSI is used as RTC clock source, the RTC continues to
  *         work in HALT and Active HALT modes, and can be used as wakeup source.
  *         However, when the HSE clock is used as RTC clock source.    
  * @note   The maximum input clock frequency for RTC is 1MHz (when using HSE/HSI as
  *         RTC clock source).
  *  
  * @retval None
  */
void CLK_RTCClockConfig(CLK_RTCCLKSource_TypeDef CLK_RTCCLKSource, CLK_RTCCLKDiv_TypeDef CLK_RTCCLKDiv)
{
  /* check the parameters */
  assert_param(IS_CLK_CLOCK_RTC(CLK_RTCCLKSource));
  assert_param(IS_CLK_CLOCK_RTC_DIV(CLK_RTCCLKDiv));

  /* Selects the source provided on to RTC and its divider*/
  CLK->CRTCR = (uint8_t)((uint8_t)CLK_RTCCLKSource | (uint8_t)CLK_RTCCLKDiv);
}

/**
  * @brief  Configures the BEEP clock (BEEPCLK).
  * @param  CLK_BEEPCLKSource: specifies the BEEP clock source.
  *          This parameter can be one of the following values:
  *            @arg CLK_BEEPCLKSource_Off: BEEP clock Off  
  *            @arg CLK_BEEPCLKSource_LSE: LSE selected as BEEP clock
  *            @arg CLK_BEEPCLKSource_LSI: LSI selected as BEEP clock  
  * @retval None
  */
void CLK_BEEPClockConfig(CLK_BEEPCLKSource_TypeDef CLK_BEEPCLKSource)
{
  /* check the parameters */
  assert_param(IS_CLK_CLOCK_BEEP(CLK_BEEPCLKSource));

  /* Selects the source provided to BEEP*/
  CLK->CBEEPR = (uint8_t)(CLK_BEEPCLKSource);

}

/**
* @brief  Enables or disables the specified peripheral clock.
  * @note   After reset, the peripheral clock (used for registers read/write access)
  *         is disabled and the application software has to enable this clock before 
  *         using it.   
  * @param  CLK_Peripheral: specifies the peripheral to gate its clock.
  *          This parameter can be any combination of the following values:
  *            @arg CLK_Peripheral_TIM2:       TIM2 clock
  *            @arg CLK_Peripheral_TIM3:       TIM3 clock 
  *            @arg CLK_Peripheral_TIM4:       TIM4 clock
  *            @arg CLK_Peripheral_I2C1:       I2C1 clock
  *            @arg CLK_Peripheral_SPI1:       SPI1 clock
  *            @arg CLK_Peripheral_USART1:     USART1 clock
  *            @arg CLK_Peripheral_BEEP:       BEEP clock
  *            @arg CLK_Peripheral_DAC:        DAC clock
  *            @arg CLK_Peripheral_ADC1:       ADC1 clock
  *            @arg CLK_Peripheral_TIM1:       TIM1 clock
  *            @arg CLK_Peripheral_RTC:        RTC clock
  *            @arg CLK_Peripheral_LCD:        LCD clock
  *            @arg CLK_Peripheral_DMA1:       DMA1 clock
  *            @arg CLK_Peripheral_COMP:       COMP clock
  *            @arg CLK_Peripheral_BOOTROM:    BOOTROM clock
  *            @arg CLK_Peripheral_AES:        AES clock
  *            @arg CLK_Peripheral_TIM5:       TIM5 clock
  *            @arg CLK_Peripheral_SPI2:       SPI2 clock
  *            @arg CLK_Peripheral_USART2:     USART2 clock
  *            @arg CLK_Peripheral_USART3:     USART3 clock
  *            @arg CLK_Peripheral_CSSLSE:     CSS on LSE clock
  * @param  NewState: new state of the specified peripheral clock.
  *          This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState)
{
  uint8_t reg = 0;

  /* Check the parameters */
  assert_param(IS_CLK_PERIPHERAL(CLK_Peripheral));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  /* get flag register */
  reg = (uint8_t)((uint8_t)CLK_Peripheral & (uint8_t)0xF0);

  if ( reg == 0x00)
  {
    if (NewState != DISABLE)
    {
      /* Enable the peripheral Clock */
      CLK->PCKENR1 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
    }
    else
    {
      /* Disable the peripheral Clock */
      CLK->PCKENR1 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
    }
  }
  else if (reg == 0x10)
  {
    if (NewState != DISABLE)
    {
      /* Enable the peripheral Clock */
      CLK->PCKENR2 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
    }
    else
    {
      /* Disable the peripheral Clock */
      CLK->PCKENR2 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
    }
  }
  else
  {
    if (NewState != DISABLE)
    {
      /* Enable the peripheral Clock */
      CLK->PCKENR3 |= (uint8_t)((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F));
    }
    else
    {
      /* Disable the peripheral Clock */
      CLK->PCKENR3 &= (uint8_t)(~(uint8_t)(((uint8_t)1 << ((uint8_t)CLK_Peripheral & (uint8_t)0x0F))));
    }
  }
}

/**
  * @}
  */
  
/** @defgroup CLK_Group4 CSS on LSE configuration functions
 *  @brief   CSS on LSE configuration functions 
 *
@verbatim   
 ===============================================================================
                        CSS on LSE configuration functions
 ===============================================================================  

  This section provides functions allowing to configure the CSS on LSE capability. 
  
  1. The LSE crystal clock source failures can be monitored when used as RTC clock
     by the mean of the LSI oscillator.
     
  2. The CSS on LSE is a feature implemented externally to RTC peripheral and though 
     has no impact the clock controller registers.

  3. To enable the CSS on LSE you can use CLK_LSEClockSecuritySystemEnable() function
     
  4. To configure the action to perform at RTC clock failure you can use 
     CLK_RTCCLKSwitchOnLSEFailureEnable() function that allows to switch the RTC clock