stm8l15x_dma.c

STM8L的tim4定时器使用

   - If Normal mode is selected: the counter is set to 0.
   - If Circular mode is selected: the counter is reloaded with the initial value
     (configured before enabling the DMA channel)
   
  The DMA_GetCurrDataCounter() function can be used to read the Channel current 
  data counter value.
     
@endverbatim
  * @{
  */
  
/**
  * @brief  Set the number of data units to transfer for DMA Channelx.
  * @param  DMA_Channelx: selects the DMA Channelx where x can be 0 to 3
  * @param  DataNumber: The number of  data units to transfer, it can be any value
  *         from 0 to 255
  * @note   It is advised to use this function rather than DMA_Init() in situations
  *         where only the Data buffer needs to be reloaded.  
  * @retval None
  */
void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMA_Channelx, uint8_t DataNumber)
{
  /* Check the parameters */
  assert_param(IS_DMA_CHANNEL(DMA_Channelx));

  /*Set the number of data units for DMA Channelx */
  DMA_Channelx->CNBTR = DataNumber;
}

/**
  * @brief  Returns the number of remaining data units in the current DMA Channelx transfer.
  * @param  DMA_Channelx: selects the DMA Channelx where x can be 0 to 3
  * @retval The number of remaining data units in the current DMA Channelx
  */
uint8_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMA_Channelx)
{
  /* Check the parameters */
  assert_param(IS_DMA_CHANNEL(DMA_Channelx));

  /* Return the number of remaining data units for DMA Channelx */
  return ((uint8_t)(DMA_Channelx->CNBTR));
}

/**
  * @}
  */

/** @defgroup DMA_Group3 Interrupts and flags management functions
 *  @brief   Interrupts and flags management functions 
 *
@verbatim   
 ===============================================================================
                  Interrupts and flags management functions
 ===============================================================================  

  This subsection provides functions allowing to configure the DMA Interrupts 
  sources and check or clear the flags or pending bits status.
  The user should identify which mode will be used in his application to manage 
  the DMA controller events: Polling mode or Interrupt mode. 
    
  Polling Mode
  =============
    Each DMA channel can be managed through 2 event Flags:
    (x: DMA channel number )
       1. DMA1_FLAG_TCx: to indicate that a Transfer Complete event occurred
       2. DMA1_FLAG_HTx: to indicate that a Half-Transfer Complete event 
                          occurred

   In this Mode it is advised to use DMA_GetFlagStatus() and  DMA_ClearFlag() 
   functions. 
      

  Interrupt Mode
  ===============
    Each DMA channel can be managed through 2 Interrupts:

    Interrupt Source
    ----------------
       1. DMA_IT_TC: specifies the interrupt source for the Transfer Complete 
                     event.  
       2. DMA_IT_HT: specifies the interrupt source for the Half-transfer 
                      Complete event.
     
  In this Mode it is advised to use DMA_ITConfig(), DMA_GetITStatus() and
  DMA_ClearITPendingBit() functions.

@endverbatim
  * @{
  */

/**
  * @brief  Enables or disables the specified DMA Channelx interrupts.
  * @param  DMA_Channelx: selects the DMA Channelx where x can be 0 to 3
  * @param  DMA_ITx: specifies the DMA interrupts sources to be enabled or disabled. 
  *          This parameter can be one of the following values:
  *            @arg DMA_ITx_TC: Transaction Complete Interrupt
  *            @arg DMA_ITx_HT: Half Transaction Interrupt  
  * @param  NewState: new state of the specified DMA interrupts.
    *       This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void DMA_ITConfig(DMA_Channel_TypeDef* DMA_Channelx, 
                  DMA_ITx_TypeDef DMA_ITx,
                  FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_DMA_CHANNEL(DMA_Channelx));
  assert_param(IS_DMA_CONFIG_ITX(DMA_ITx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected DMA interrupts */
    DMA_Channelx->CCR |= (uint8_t)(DMA_ITx);
  }
  else
  {
    /* Disable the selected DMA interrupts */
    DMA_Channelx->CCR &= (uint8_t)~(DMA_ITx);
  }
}

/**
  * @brief  Checks whether the specified DMA Channelx flag is set or not.
  * @param  DMA_FLAG: specifies the flag to check.
  *          This parameter can be one of the following values:
  *            @arg DMA1_FLAG_GB: Global Busy Flag
  *            @arg DMA1_FLAG_IFC0: Global Interrupt Flag Channel 0
  *            @arg DMA1_FLAG_IFC1: Global Interrupt Flag Channel 1
  *            @arg DMA1_FLAG_IFC2: Global Interrupt Flag Channel 2
  *            @arg DMA1_FLAG_IFC3: Global Interrupt Flag Channel 3
  *            @arg DMA1_FLAG_TC0: Transaction Complete Interrupt Flag Channel 0
  *            @arg DMA1_FLAG_TC1: Transaction Complete Interrupt Flag Channel 1
  *            @arg DMA1_FLAG_TC2: Transaction Complete Interrupt Flag Channel 2
  *            @arg DMA1_FLAG_TC2: Transaction Complete Interrupt Flag Channel 3
  *            @arg DMA1_FLAG_HT0: Half Transaction Interrupt Flag Channel 0
  *            @arg DMA1_FLAG_HT1: Half Transaction Interrupt Flag Channel 1
  *            @arg DMA1_FLAG_HT2: Half Transaction Interrupt Flag Channel 2
  *            @arg DMA1_FLAG_HT3: Half Transaction Interrupt Flag Channel 3
  *            @arg DMA1_FLAG_PEND0: DMA Request pending on Channel 0
  *            @arg DMA1_FLAG_PEND1: DMA Request pending on Channel 1
  *            @arg DMA1_FLAG_PEND2: DMA Request pending on Channel 2
  *            @arg DMA1_FLAG_PEND3: DMA Request pending on Channel 3
  *            @arg DMA1_FLAG_BUSY0: No DMA transfer on going in Channel 0
  *            @arg DMA1_FLAG_BUSY1: No DMA transfer on going in Channel 1 
  *            @arg DMA1_FLAG_BUSY2: No DMA transfer on going in Channel 2 
  *            @arg DMA1_FLAG_BUSY3: No DMA transfer on going in Channel 3                                        
  * @retval  The status of DMA_FLAG (SET or RESET).
  */
FlagStatus DMA_GetFlagStatus(DMA_FLAG_TypeDef DMA_FLAG)
{
  FlagStatus flagstatus = RESET;
  DMA_Channel_TypeDef* DMA_Channelx =  DMA1_Channel0;
  uint8_t tmpgir1 = 0;
  uint8_t tmpgcsr = 0;

  /* Check the parameters */
  assert_param(IS_DMA_GET_FLAG(DMA_FLAG));

  /* Get flags registers values*/
  tmpgcsr = DMA1->GCSR;
  tmpgir1 = DMA1->GIR1;

  if (((uint16_t)DMA_FLAG & (uint16_t)0x0F00) != (uint16_t)RESET)
  {
    /* find  the used DMA  channel */
    if (((uint16_t)DMA_FLAG & 0x0100) != (uint16_t)RESET)
    {
      DMA_Channelx = DMA1_Channel0;
    }
    else if  (((uint16_t)DMA_FLAG & 0x0200) != (uint16_t)RESET)
    {
      DMA_Channelx = DMA1_Channel1;
    }
    else if  (((uint16_t)DMA_FLAG & 0x0400) != (uint16_t)RESET)
    {
      DMA_Channelx = DMA1_Channel2;
    }
    else
    {
      DMA_Channelx = DMA1_Channel3;
    }

    /*   Get the specified DMA Channelx flag status. */
    flagstatus = (FlagStatus)((uint8_t)(DMA_Channelx->CSPR) & (uint8_t)DMA_FLAG);
  }
  else if (((uint16_t)DMA_FLAG & 0x1000) != (uint16_t)RESET)
  {
    /*   Get the specified DMA Channelx flag status. */
    flagstatus = (FlagStatus)(tmpgir1 & (uint8_t)DMA_FLAG);
  }
  else /*if ((DMA_FLAG & DMA_FLAG_GB) != (uint16_t)RESET)*/
  {
    /*   Get the specified DMA Channelx flag status. */
    flagstatus = (FlagStatus)(tmpgcsr & DMA_GCSR_GB);
  }

  /*  Return the specified DMA Channelx flag status. */
  return (flagstatus);
}

/**
  * @brief  Clears the DMA Channels selected flags.
  * @param  DMA_FLAG: specifies the flag to clear.
  *          This parameter can be one or a combination (for the same channel)of
  *          the following values:
  *            @arg DMA1_FLAG_TC0: Transaction Complete Interrupt Flag Channel 0
  *            @arg DMA1_FLAG_TC1: Transaction Complete Interrupt Flag Channel 1
  *            @arg DMA1_FLAG_TC2: Transaction Complete Interrupt Flag Channel 2
  *            @arg DMA1_FLAG_TC2: Transaction Complete Interrupt Flag Channel 3
  *            @arg DMA1_FLAG_HT0: Half Transaction Interrupt Flag Channel 0
  *            @arg DMA1_FLAG_HT1: Half Transaction Interrupt Flag Channel 1
  *            @arg DMA1_FLAG_HT2: Half Transaction Interrupt Flag Channel 2
  *            @arg DMA1_FLAG_HT3: Half Transaction Interrupt Flag Channel 3
  * @retval None
  */
void DMA_ClearFlag(DMA_FLAG_TypeDef DMA_FLAG)
{
  DMA_Channel_TypeDef* DMA_Channelx =  DMA1_Channel0;

  /* Check the parameters */
  assert_param(IS_DMA_CLEAR_FLAG(DMA_FLAG));

  /* Identify  the used DMA  channel */
  if (((uint16_t)DMA_FLAG & (uint16_t)0x0100) != (uint16_t)RESET)
  {
    DMA_Channelx = DMA1_Channel0;
  }
  else
  {
    if (((uint16_t)DMA_FLAG & (uint16_t)0x0200) != (uint16_t)RESET)
    {
      DMA_Channelx = DMA1_Channel1;
    }
    else
    {
      if (((uint16_t)DMA_FLAG & (uint16_t)0x0400) != (uint16_t)RESET)
      {
        DMA_Channelx = DMA1_Channel2;
      }
      else
      {
        DMA_Channelx = DMA1_Channel3;
      }
    }
  }

  /*Clears the DMA flags.*/
  DMA_Channelx->CSPR &= (uint8_t)~(uint8_t)((uint8_t)DMA_FLAG & (uint8_t)0x06);
}

/**
  * @brief  Checks whether the specified DMA Channelx interrupt has occurred or not.
  * @param  DMA_IT: specifies the DMA interrupt source to check.
  *          This parameter can be one or a combination of the following values:
  *            @arg DMA1_IT_TC0: Transaction Complete Interrupt Channel 0
  *            @arg DMA1_IT_TC1: Transaction Complete Interrupt Channel 1
  *            @arg DMA1_IT_TC2: Transaction Complete Interrupt Channel 2
  *            @arg DMA1_IT_TC3: Transaction Complete Interrupt Channel 3
  *            @arg DMA1_IT_HT0: Half Transaction Interrupt Channel 0
  *            @arg DMA1_IT_HT1: Half Transaction Interrupt Channel 1
  *            @arg DMA1_IT_HT2: Half Transaction Interrupt Channel 2
  *            @arg DMA1_IT_HT3: Half Transaction Interrupt Channel 3    
  * @retval ITStatus: The status of DMA_IT (SET or RESET).
  */
ITStatus DMA_GetITStatus(DMA_IT_TypeDef DMA_IT)
{
  ITStatus itstatus = RESET;
  uint8_t tmpreg = 0;
  uint8_t tmp2 = 0;
  DMA_Channel_TypeDef* DMA_Channelx =  DMA1_Channel0;

  /* Check the parameters */
  assert_param(IS_DMA_GET_IT(DMA_IT));

  /* Identify  the used DMA  channel */
  if ((DMA_IT & 0x10) != (uint8_t)RESET)
  {
    DMA_Channelx = DMA1_Channel0;
  }
  else
  {
    if  ((DMA_IT & 0x20) != (uint8_t)RESET)
    {
      DMA_Channelx = DMA1_Channel1;
    }
    else
    {
      if  ((DMA_IT & 0x40) != (uint8_t)RESET)
      {
        DMA_Channelx = DMA1_Channel2;
      }
      else
      {
        DMA_Channelx = DMA1_Channel3;
      }
    }
  }
  /*   Get the specified DMA Channelx interrupt status. */
  tmpreg =  DMA_Channelx->CSPR ;
  tmpreg &= DMA_Channelx->CCR ;
  tmp2 = (uint8_t)(DMA_IT & (uint8_t)(DMA_CCR_TCIE | DMA_CCR_HTIE));
  itstatus = (ITStatus)((uint8_t)tmpreg & (uint8_t)tmp2);

  /*   Return the specified DMA Channelx interrupt status. */
  return (itstatus);
}

/**
  * @brief  Clears the DMA Channelx抯 interrupt pending bits.
  * @param  DMA_IT: specifies the DMA interrupt pending bit to clear.
  *          This parameter can be one or a combination(for the same channel)of 
  *          the following values:
  *            @arg DMA1_IT_TC0: Transaction Complete Interrupt Channel 0
  *            @arg DMA1_IT_TC1: Transaction Complete Interrupt Channel 1
  *            @arg DMA1_IT_TC2: Transaction Complete Interrupt Channel 2
  *            @arg DMA1_IT_TC3: Transaction Complete Interrupt Channel 3
  *            @arg DMA1_IT_HT0: Half Transaction Interrupt Channel 0
  *            @arg DMA1_IT_HT1: Half Transaction Interrupt Channel 1
  *            @arg DMA1_IT_HT2: Half Transaction Interrupt Channel 2
  *            @arg DMA1_IT_HT3: Half Transaction Interrupt Channel 3 
  * @retval None
  */
void DMA_ClearITPendingBit(DMA_IT_TypeDef DMA_IT)
{
  DMA_Channel_TypeDef* DMA_Channelx =  DMA1_Channel0;

  /* Check the parameters */
  assert_param(IS_DMA_CLEAR_IT(DMA_IT));
  /* Identify  the used DMA  channel */
  if ((DMA_IT & 0x10) != (uint8_t)RESET)
  {
    DMA_Channelx = DMA1_Channel0;
  }
  else
  {
    if ((DMA_IT & 0x20) != (uint8_t)RESET)
    {
      DMA_Channelx = DMA1_Channel1;
    }
    else
    {
      if ((DMA_IT & 0x40) != (uint8_t)RESET)
      {
        DMA_Channelx = DMA1_Channel2;
      }
      else
      {
        DMA_Channelx = DMA1_Channel3;
      }
    }
  }
  /*Clears the DMA Channelx抯 interrupt pending bits*/
  DMA_Channelx->CSPR &= (uint8_t)~(uint8_t)(DMA_IT & (uint8_t)0x06);
}

/**
  * @}
  */ 

/**
  * @}
  */ 
  
/**
  * @}
  */

/**
  * @}
  */

/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/