stm8l15x_tim5.h

STM8L的tim4定时器使用

/**
  ******************************************************************************
  * @file    stm8l15x_tim5.h
  * @author  MCD Application Team
  * @version V1.5.0
  * @date    13-May-2011
  * @brief   This file contains all the functions prototypes for the TIM5 firmware
  *          library.
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************  
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8L15x_TIM5_H
#define __STM8L15x_TIM5_H


/* Includes ------------------------------------------------------------------*/
#include "stm8l15x.h"

/** @addtogroup STM8L15x_StdPeriph_Driver
  * @{
  */
  
/** @addtogroup TIM5
  * @{
  */ 
/* Exported types ------------------------------------------------------------*/

/** @defgroup TIM5_Exported_Types
  * @{
  */

/** @defgroup TIM5_Forced_Action
  * @{
  */
typedef enum
{
  TIM5_ForcedAction_Active   = ((uint8_t)0x50),   /*!< Output Reference is forced low */
  TIM5_ForcedAction_Inactive = ((uint8_t)0x40)    /*!< Output Reference is forced high */
}
TIM5_ForcedAction_TypeDef;

#define IS_TIM5_FORCED_ACTION(ACTION) (((ACTION) == TIM5_ForcedAction_Active) || \
                                       ((ACTION) == TIM5_ForcedAction_Inactive))
/**
  * @}
  */
  
/** @defgroup TIM5_Prescaler
  * @{
  */
typedef enum
{
  TIM5_Prescaler_1     = ((uint8_t)0x00),   /*!< Time base Prescaler = 1 (No effect)*/
  TIM5_Prescaler_2     = ((uint8_t)0x01),   /*!< Time base Prescaler = 2 */
  TIM5_Prescaler_4     = ((uint8_t)0x02),   /*!< Time base Prescaler = 4 */
  TIM5_Prescaler_8     = ((uint8_t)0x03),   /*!< Time base Prescaler = 8 */
  TIM5_Prescaler_16    = ((uint8_t)0x04),   /*!< Time base Prescaler = 16 */
  TIM5_Prescaler_32    = ((uint8_t)0x05),   /*!< Time base Prescaler = 32 */
  TIM5_Prescaler_64    = ((uint8_t)0x06),   /*!< Time base Prescaler = 64 */
  TIM5_Prescaler_128   = ((uint8_t)0x07)    /*!< Time base Prescaler = 128 */
}TIM5_Prescaler_TypeDef;

#define IS_TIM5_PRESCALER(PRESCALER) (((PRESCALER) == TIM5_Prescaler_1)  || \
                                      ((PRESCALER) == TIM5_Prescaler_2)  || \
                                      ((PRESCALER) == TIM5_Prescaler_4)  || \
                                      ((PRESCALER) == TIM5_Prescaler_8)  || \
                                      ((PRESCALER) == TIM5_Prescaler_16) || \
                                      ((PRESCALER) == TIM5_Prescaler_32) || \
                                      ((PRESCALER) == TIM5_Prescaler_64) || \
                                      ((PRESCALER) == TIM5_Prescaler_128))
/**
  * @}
  */
  
/** @defgroup TIM5_OCMode
  * @{
  */
typedef enum
{
  TIM5_OCMode_Timing    = ((uint8_t)0x00),   /*!< Timing (Frozen) Mode*/
  TIM5_OCMode_Active    = ((uint8_t)0x10),   /*!< Active Mode*/
  TIM5_OCMode_Inactive  = ((uint8_t)0x20),   /*!< Inactive Mode*/
  TIM5_OCMode_Toggle    = ((uint8_t)0x30),   /*!< Toggle Mode*/
  TIM5_OCMode_PWM1      = ((uint8_t)0x60),   /*!< PWM Mode 1*/
  TIM5_OCMode_PWM2      = ((uint8_t)0x70)    /*!< PWM Mode 2*/
}TIM5_OCMode_TypeDef;

#define IS_TIM5_OC_MODE(MODE) (((MODE) ==  TIM5_OCMode_Timing)  || \
                               ((MODE) == TIM5_OCMode_Active)   || \
                               ((MODE) == TIM5_OCMode_Inactive) || \
                               ((MODE) == TIM5_OCMode_Toggle)   || \
                               ((MODE) == TIM5_OCMode_PWM1)     || \
                               ((MODE) == TIM5_OCMode_PWM2))

#define IS_TIM5_OCM(MODE) (((MODE) ==  TIM5_OCMode_Timing)  || \
                           ((MODE) == TIM5_OCMode_Active)   || \
                           ((MODE) == TIM5_OCMode_Inactive) || \
                           ((MODE) == TIM5_OCMode_Toggle)   || \
                           ((MODE) == TIM5_OCMode_PWM1)     || \
                           ((MODE) == TIM5_OCMode_PWM2)     || \
                           ((MODE) == (uint8_t)TIM5_ForcedAction_Active) || \
                           ((MODE) == (uint8_t)TIM5_ForcedAction_Inactive))
/**
  * @}
  */
  
/** @defgroup TIM5_OnePulseMode
  * @{
  */
typedef enum
{
  TIM5_OPMode_Single      = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */
  TIM5_OPMode_Repetitive  = ((uint8_t)0x00)  /*!< Repetitive Pulse mode (OPM inactive) */
}TIM5_OPMode_TypeDef;

#define IS_TIM5_OPM_MODE(MODE) (((MODE) == TIM5_OPMode_Single) || \
                                ((MODE) == TIM5_OPMode_Repetitive))
/**
  * @}
  */
  
/** @defgroup TIM5_Channel
  * @{
  */
typedef enum
{
  TIM5_Channel_1  = ((uint8_t)0x00),  /*!< Channel 1*/
  TIM5_Channel_2  = ((uint8_t)0x01)   /*!< Channel 2*/
}TIM5_Channel_TypeDef;

#define IS_TIM5_CHANNEL(CHANNEL) (((CHANNEL) == TIM5_Channel_1) || \
                                  ((CHANNEL) == TIM5_Channel_2) )
/**
  * @}
  */
  
/** @defgroup TIM5_CounterMode
  * @{
  */
typedef enum
{
  TIM5_CounterMode_Up               = ((uint8_t)0x00),   /*!< Counter Up Mode */
  TIM5_CounterMode_Down             = ((uint8_t)0x10),   /*!< Counter Down Mode */
  TIM5_CounterMode_CenterAligned1   = ((uint8_t)0x20),   /*!< Counter Central aligned Mode 1 */
  TIM5_CounterMode_CenterAligned2   = ((uint8_t)0x40),   /*!< Counter Central aligned Mode 2 */
  TIM5_CounterMode_CenterAligned3   = ((uint8_t)0x60)    /*!< Counter Central aligned Mode 3 */
}TIM5_CounterMode_TypeDef;

#define IS_TIM5_COUNTER_MODE(MODE) (((MODE) == TIM5_CounterMode_Up)   || \
                                    ((MODE) == TIM5_CounterMode_Down) || \
                                    ((MODE) == TIM5_CounterMode_CenterAligned1) || \
                                    ((MODE) == TIM5_CounterMode_CenterAligned2) || \
                                    ((MODE) == TIM5_CounterMode_CenterAligned3))
/**
  * @}
  */
  
/** @defgroup TIM5_Output_Compare_Polarity
  * @{
  */
typedef enum
{
  TIM5_OCPolarity_High   = ((uint8_t)0x00),   /*!< Output compare polarity  = High */
  TIM5_OCPolarity_Low    = ((uint8_t)0x01)    /*!< Output compare polarity  = Low */
}TIM5_OCPolarity_TypeDef;

#define IS_TIM5_OC_POLARITY(POLARITY) (((POLARITY) == TIM5_OCPolarity_High) || \
                                       ((POLARITY) == TIM5_OCPolarity_Low))
/**
  * @}
  */
  
/** @defgroup TIM5_Output_State
  * @{
  */
typedef enum
{
  TIM5_OutputState_Disable   = ((uint8_t)0x00),   /*!< Output compare State disabled (channel output disabled) */
  TIM5_OutputState_Enable    = ((uint8_t)0x01)    /*!< Output compare State enabled (channel output enabled) */
}TIM5_OutputState_TypeDef;

#define IS_TIM5_OUTPUT_STATE(STATE) (((STATE) == TIM5_OutputState_Disable) || \
                                     ((STATE) == TIM5_OutputState_Enable))

/**
  * @}
  */
  
/** @defgroup TIM5_Break_State
  * @{
  */
typedef enum
{
  TIM5_BreakState_Disable  = ((uint8_t)0x00),   /*!< Break State disabled (break option disabled) */
  TIM5_BreakState_Enable   = ((uint8_t)0x10)    /*!< Break State enabled (break option enabled) */
}TIM5_BreakState_TypeDef;

#define IS_TIM5_BREAK_STATE(STATE) (((STATE) == TIM5_BreakState_Enable) || \
                                    ((STATE) == TIM5_BreakState_Disable))
/**
  * @}
  */
  
/** @defgroup TIM5_Break_Polarity
  * @{
  */
typedef enum
{
  TIM5_BreakPolarity_High  = ((uint8_t)0x20),  /*!< if Break, channel polarity = High */
  TIM5_BreakPolarity_Low   = ((uint8_t)0x00)   /*!< if Break, channel polarity = Low */
}TIM5_BreakPolarity_TypeDef;

#define IS_TIM5_BREAK_POLARITY(POLARITY) \
  (((POLARITY) == TIM5_BreakPolarity_Low) || \
   ((POLARITY) == TIM5_BreakPolarity_High))
/**
  * @}
  */

/** @defgroup TIM5_Automatic_Output
  * @{
  */
typedef enum
{
  TIM5_AutomaticOutput_Enable    = ((uint8_t)0x40),   /*!< Automatic Output option enabled */
  TIM5_AutomaticOutput_Disable   = ((uint8_t)0x00)    /*!< Automatic Output option disabled */
}TIM5_AutomaticOutput_TypeDef;

#define IS_TIM5_AUTOMATIC_OUTPUT_STATE(STATE) \
  (((STATE) == TIM5_AutomaticOutput_Enable) || \
   ((STATE) == TIM5_AutomaticOutput_Disable))
/**
  * @}
  */
  
/** @defgroup TIM5_Lock_Level
  * @{
  */
typedef enum
{
  TIM5_LockLevel_Off  = ((uint8_t)0x00),   /*!< Lock option disabled */
  TIM5_LockLevel_1    = ((uint8_t)0x01),   /*!< Select Lock Level 1  */
  TIM5_LockLevel_2    = ((uint8_t)0x02),   /*!< Select Lock Level 2  */
  TIM5_LockLevel_3    = ((uint8_t)0x03)    /*!< Select Lock Level 3  */
}TIM5_LockLevel_TypeDef;

#define IS_TIM5_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM5_LockLevel_Off) || \
                                   ((LEVEL) == TIM5_LockLevel_1)   || \
                                   ((LEVEL) == TIM5_LockLevel_2)   || \
                                   ((LEVEL) == TIM5_LockLevel_3))
/**
  * @}
  */
  
/** @defgroup TIM5_OSSI_State
  * @{
  */
typedef enum
{
  TIM5_OSSIState_Enable    = ((uint8_t)0x04),   /*!< Off-State Selection for Idle mode enabled  */
  TIM5_OSSIState_Disable   = ((uint8_t)0x00)    /*!< Off-State Selection for Idle mode disabled  */
}TIM5_OSSIState_TypeDef;

#define IS_TIM5_OSSI_STATE(STATE) \
  (((STATE) == TIM5_OSSIState_Enable) || \
   ((STATE) == TIM5_OSSIState_Disable))
/**
  * @}
  */
  
/** @defgroup TIM5_Output_Compare_Idle_state
  * @{
  */
typedef enum
{
  TIM5_OCIdleState_Reset  = ((uint8_t)0x00),   /*!< Output Compare Idle state  = Reset */
  TIM5_OCIdleState_Set    = ((uint8_t)0x01)    /*!< Output Compare Idle state  = Set */
}TIM5_OCIdleState_TypeDef;

#define IS_TIM5_OCIDLE_STATE(STATE) \
  (((STATE) == TIM5_OCIdleState_Set) || \
   ((STATE) == TIM5_OCIdleState_Reset))
/**
  * @}
  */
  
/** @defgroup TIM5_Input_Capture_Polarity
  * @{
  */
typedef enum
{
  TIM5_ICPolarity_Rising   = ((uint8_t)0x00),   /*!< Input Capture on Rising Edge*/
  TIM5_ICPolarity_Falling  = ((uint8_t)0x01)    /*!< Input Capture on Falling Edge*/
}TIM5_ICPolarity_TypeDef;

#define IS_TIM5_IC_POLARITY(POLARITY) \
  (((POLARITY) == TIM5_ICPolarity_Rising) || \
   ((POLARITY) == TIM5_ICPolarity_Falling))
/**
  * @}
  */
  
/** @defgroup TIM5_Input_Capture_Selection
  * @{
  */
typedef enum
{
  TIM5_ICSelection_DirectTI    = ((uint8_t)0x01),   /*!< Input Capture mapped on the direct input*/
  TIM5_ICSelection_IndirectTI  = ((uint8_t)0x02),   /*!< Input Capture mapped on the indirect input*/
  TIM5_ICSelection_TRGI        = ((uint8_t)0x03)    /*!< Input Capture mapped on the Trigger Input*/
}TIM5_ICSelection_TypeDef;

#define IS_TIM5_IC_SELECTION(SELECTION) \
  (((SELECTION) == TIM5_ICSelection_DirectTI)   || \
   ((SELECTION) == TIM5_ICSelection_IndirectTI) || \
   ((SELECTION) == TIM5_ICSelection_TRGI))
/**
  * @}
  */
  
/** @defgroup TIM5_Input_Capture_Prescaler
  * @{
  */
typedef enum
{
  TIM5_ICPSC_DIV1  = ((uint8_t)0x00),  /*!< Input Capture Prescaler = 1 (one capture every 1 event) */
  TIM5_ICPSC_DIV2  = ((uint8_t)0x04),  /*!< Input Capture Prescaler = 2 (one capture every 2 events) */
  TIM5_ICPSC_DIV4  = ((uint8_t)0x08),  /*!< Input Capture Prescaler = 4 (one capture every 4 events) */
  TIM5_ICPSC_DIV8  = ((uint8_t)0x0C)   /*!< Input Capture Prescaler = 8 (one capture every 8 events) */
}TIM5_ICPSC_TypeDef;

#define IS_TIM5_IC_PRESCALER(PRESCALER) \
  (((PRESCALER) == TIM5_ICPSC_DIV1) || \
   ((PRESCALER) == TIM5_ICPSC_DIV2) || \
   ((PRESCALER) == TIM5_ICPSC_DIV4) || \
   ((PRESCALER) == TIM5_ICPSC_DIV8))
/**
  * @}
  */
  
/** @defgroup TIM5_Interrupts
  * @{
  */
typedef enum
{
  TIM5_IT_Update   = ((uint8_t)0x01),   /*!< Update Interrupt*/
  TIM5_IT_CC1      = ((uint8_t)0x02),   /*!< Capture Compare Channel1 Interrupt*/
  TIM5_IT_CC2      = ((uint8_t)0x04),   /*!< Capture Compare Channel2 Interrupt*/
  TIM5_IT_Trigger  = ((uint8_t)0x40),   /*!< Trigger  Interrupt*/
  TIM5_IT_Break    = ((uint8_t)0x80)    /*!< Break Interrupt*/
}TIM5_IT_TypeDef;

#define IS_TIM5_IT(IT) \
  ((IT) != 0x00)

#define IS_TIM5_GET_IT(IT) \
  (((IT) == TIM5_IT_Update)  || \
   ((IT) == TIM5_IT_CC1)     || \
   ((IT) == TIM5_IT_CC2)     || \
   ((IT) == TIM5_IT_Trigger) || \
   ((IT) == TIM5_IT_Break))
/**
  * @}
  */
  
/** @defgroup TIM5_External_Trigger_Prescaler
  * @{
  */
typedef enum
{
  TIM5_ExtTRGPSC_OFF   = ((uint8_t)0x00),   /*!< No External Trigger prescaler  */