stm8l15x.h

STM8L的tim4定时器使用

/**
  ******************************************************************************
  * @file    stm8l15x.h
  * @author  MCD Application Team
  * @version V1.5.0
  * @date    13-May-2011
  * @brief   This file contains all the peripheral register's definitions, bits
  *          definitions and memory mapping for STM8L15x devices.
  ******************************************************************************
  * @attention
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  ******************************************************************************  
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8L15x_H
 #define __STM8L15x_H

/** @addtogroup STM8L15x_StdPeriph_Driver
  * @{
  */
/* Uncomment the line below according to the target STM8L15x device used in your
   application
  */
/* #define STM8L15X_LD */     /*!< STM8L15X_LD: STM8L15x Low density devices */
#define STM8L15X_MD */     /*!< STM8L15X_MD: STM8L15x Medium density devices */
/* #define STM8L15X_MDP */    /*!< STM8L15X_MDP: STM8L15x Medium density plus devices */
/* #define STM8L15X_HD */    /*!< STM8L15X_HD: STM8L15x/16x High density devices */

/*  Tip: To avoid modifying this file each time you need to switch between these
        devices, you can define the device in your toolchain compiler preprocessor.

 - Low density STM8L15x devices are STM8L151C3, STM8L151K3, STM8L151G3, STM8L151F3,
   STM8L151C2, STM8L151K2, STM8L151G2 and STM8L151F2 microcontrollers where the 
   Flash memory density ranges between 4 and 8 Kbytes.
 - Medium density STM8L15x devices are STM8L151C4, STM8L151C6, STM8L152C4,
   STM8L152C6, STM8L151K4, STM8L151K6, STM8L152K4, STM8L152K6, STM8L151G4,
   STM8L151G6, STM8L152G4 and STM8L152G6 microcontrollers where the Flash memory
   density ranges between 16 and 32 Kbytes.
 - Medium density Plus devices are STM8L151R6, STM8L152R6 microcontrollers where
  the Flash memory density is fixed and equal to 32 Kbytes and a wider range of
  peripheral than the medium density devices.
 - High density STM8L15x devices are STM8L151x8, STM8L152x8, STM8L162R8 and STM8L162M8
   microcontrollers where the Flash memory density is fixed and equal to 64 Kbytes with 
   the same peripheral set than Medium Density Plus devices.

 */

#if !defined (STM8L15X_MD) && !defined (STM8L15X_MDP) && !defined (STM8L15X_HD) && !defined (STM8L15X_LD)
 #error "Please select first the target STM8L device used in your application (in stm8l15x.h file)"
#endif

/******************************************************************************/
/*                   Library configuration section                            */
/******************************************************************************/
/* Check the used compiler */
#if defined(__CSMC__)
 #define _COSMIC_
#elif defined(__RCST7__)
 #define _RAISONANCE_
#elif defined(__ICCSTM8__)
 #define _IAR_
#else
 #error "Unsupported Compiler!"          /* Compiler defines not found */
#endif

#if !defined  USE_STDPERIPH_DRIVER
/* Comment the line below if you will not use the peripherals drivers.
   In this case, these drivers will not be included and the application code will be
   based on direct access to peripherals registers */
 #define USE_STDPERIPH_DRIVER
#endif

/**
 * @brief In the following line adjust the value of External High Speed oscillator (HSE)
   used in your application

   Tip: To avoid modifying this file each time you need to use different HSE, you
        can define the HSE value in your toolchain compiler preprocessor.
  */
#if !defined  HSE_Value
 #define HSE_VALUE   ((uint32_t)16000000) /*!< Typical Value of the HSE in Hz */
#endif /* HSE_Value */

/**
  * @brief Definition of External Low Speed oscillator (LSE) frequency
  */
#define LSE_VALUE   ((uint32_t)32768)   /*!< Typical Value of the LSE in Hz */

/**
  * @brief Definition of Device on-chip RC oscillator frequencies
  */
#define HSI_VALUE   ((uint32_t)16000000) /*!< Typical Value of the HSI in Hz */
#define LSI_VALUE   ((uint32_t)38000)    /*!< Typical Value of the LSI in Hz */

#ifdef _COSMIC_
 #define FAR  @far
 #define NEAR @near
 #define TINY @tiny
 #define EEPROM @eeprom
 #define CONST  const
#elif defined (_RAISONANCE_) /* __RCST7__ */
 #define FAR  far
 #define NEAR data
 #define TINY page0
 #define EEPROM eeprom
 #define CONST  code
 #if defined (STM8L15X_MD) || defined (STM8L15X_MDP)
  /*!< Used with memory Models for code less than 64K */
  #define MEMCPY memcpy
 #else /* STM8L15X_HD */
   /*!< Used with memory Models for code higher than 64K */
  #define MEMCPY fmemcpy
 #endif /* STM8L15X_MD or STM8L15X_MDP */ 
#else /*_IAR_*/
 #define FAR  __far
 #define NEAR __near
 #define TINY __tiny
 #define EEPROM __eeprom
 #define CONST  const
#endif /* __CSMC__ */

/**
  * @brief Legacy definition
  */
#define __CONST  CONST

#if defined (STM8L15X_MD) || defined (STM8L15X_MDP) || defined (STM8L15X_LD) 
/*!< Used with memory Models for code smaller than 64K */
 #define PointerAttr NEAR
#else /* STM8L15X_HD */
/*!< Used with memory Models for code higher than 64K */
 #define PointerAttr FAR
#endif /* STM8L15X_MD or STM8L15X_MDP or STM8L15X_LD*/

/* Uncomment the line below to enable the FLASH functions execution from RAM */
#if !defined (RAM_EXECUTION)
/* #define RAM_EXECUTION  (1) */
#endif /* RAM_EXECUTION */

#ifdef RAM_EXECUTION
 #ifdef _COSMIC_
   #define IN_RAM(a) a
 #elif defined (_RAISONANCE_) /* __RCST7__ */
   #define IN_RAM(a) a inram
 #else /*_IAR_*/
  #define IN_RAM(a) __ramfunc a
 #endif /* _COSMIC_ */
#else 
  #define IN_RAM(a) a
#endif /* RAM_EXECUTION */

/*!< [31:16] STM8L15X Standard Peripheral Library main version */
#define __STM8L15X_STDPERIPH_VERSION_MAIN   ((uint8_t)0x01) /*!< [31:24] main version */                                  
#define __STM8L15X_STDPERIPH_VERSION_SUB1   ((uint8_t)0x05) /*!< [23:16] sub1 version */
#define __STM8L15X_STDPERIPH_VERSION_SUB2   ((uint8_t)0x00) /*!< [15:8]  sub2 version */
#define __STM8L15X_STDPERIPH_VERSION_RC     ((uint8_t)0x00) /*!< [7:0]  release candidate */ 
#define __STM8L15X_STDPERIPH_VERSION       ( (__STM8L15X_STDPERIPH_VERSION_MAIN << 24)\
                                          |(__STM8L15X_STDPERIPH_VERSION_SUB1 << 16)\
                                          |(__STM8L15X_STDPERIPH_VERSION_SUB2 << 8)\
                                          |(__STM8L15X_STDPERIPH_VERSION_RC))

/******************************************************************************/

/* Includes ------------------------------------------------------------------*/

/* Exported types and constants ----------------------------------------------*/

/** @addtogroup Exported_types
  * @{
  */

/**
 * IO definitions
 *
 * define access restrictions to peripheral registers
 */
#define     __I     volatile const   /*!< defines 'read only' permissions     */
#define     __O     volatile         /*!< defines 'write only' permissions    */
#define     __IO    volatile         /*!< defines 'read / write' permissions  */

/*!< Signed integer types  */
typedef   signed char     int8_t;
typedef   signed short    int16_t;
typedef   signed long     int32_t;

/*!< Unsigned integer types  */
typedef unsigned char     uint8_t;
typedef unsigned short    uint16_t;
typedef unsigned long     uint32_t;

/*!< STM8Lx Standard Peripheral Library old types (maintained for legacy purpose) */

typedef int32_t  s32;
typedef int16_t s16;
typedef int8_t  s8;

typedef uint32_t  u32;
typedef uint16_t u16;
typedef uint8_t  u8;


typedef enum {FALSE = 0, TRUE = !FALSE} bool;

typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction;

typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))

typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;

#define U8_MAX     (255)
#define S8_MAX     (127)
#define S8_MIN     (-128)
#define U16_MAX    (65535u)
#define S16_MAX    (32767)
#define S16_MIN    (-32768)
#define U32_MAX    (4294967295uL)
#define S32_MAX    (2147483647)
#define S32_MIN    (-2147483648uL)

/**
  * @}
  */

/** @addtogroup MAP_FILE_Exported_Types_and_Constants
  * @{
  */

/******************************************************************************/
/*                          IP registers structures                           */
/******************************************************************************/

/*----------------------------------------------------------------------------*/
/**
  * @brief General Purpose I/Os (GPIO)
  */
typedef struct GPIO_struct
{
  __IO uint8_t ODR; /*!< Output Data Register */
  __IO uint8_t IDR; /*!< Input Data Register */
  __IO uint8_t DDR; /*!< Data Direction Register */
  __IO uint8_t CR1; /*!< Configuration Register 1 */
  __IO uint8_t CR2; /*!< Configuration Register 2 */
}
GPIO_TypeDef;

/** @addtogroup GPIO_Registers_Reset_Value
  * @{
  */
#define GPIO_ODR_RESET_VALUE ((uint8_t)0x00)
#define GPIO_DDR_RESET_VALUE ((uint8_t)0x00)
#define GPIO_CR1_RESET_VALUE ((uint8_t)0x00)
#define GPIO_CR2_RESET_VALUE ((uint8_t)0x00)
/**
  * @}
  */
/*----------------------------------------------------------------------------*/

/**
  * @brief Real-Time Clock (RTC) peripheral registers.
  */
typedef struct RTC_struct
{
  __IO uint8_t TR1; /*!<  Time  Register  1*/
  __IO uint8_t TR2; /*!<  Time  Register  2*/
  __IO uint8_t TR3; /*!<  Time  Register  3*/

  uint8_t RESERVED0;

  __IO uint8_t DR1; /*!<  Date  Register  1*/
  __IO uint8_t DR2; /*!<  Date  Register  2*/
  __IO uint8_t DR3; /*!<  Date  Register  3*/

  uint8_t RESERVED1;

  __IO uint8_t CR1; /*!<  Control  Register  1*/
  __IO uint8_t CR2; /*!<  Control  Register  2*/
  __IO uint8_t CR3; /*!<  Control  Register  3*/

  uint8_t RESERVED2;

  __IO uint8_t ISR1; /*!<  Initialisation and Status  Register 1 */
  __IO uint8_t ISR2; /*!<  Initialisation and Status  Register 2 */

  uint8_t RESERVED3;
  uint8_t RESERVED4;

  __IO uint8_t SPRERH; /*!<  Synchronous Prediv high  Register  */
  __IO uint8_t SPRERL; /*!<  Synchronous Prediv Low Register  */
  __IO uint8_t APRER;  /*!<  Asynchronous Prediv  Register  */

  uint8_t RESERVED5;

  __IO uint8_t WUTRH; /*!<  Wake-Up Timer High Register  */
  __IO uint8_t WUTRL; /*!<  Wake-Up Timer  Low Register  */

  uint8_t RESERVED6;

  __IO uint8_t SSRH; /*!< Sub Second High Register  */
  __IO uint8_t SSRL; /*!< Sub Second Low Register  */

  __IO uint8_t WPR;  /*!< Write Protection Register  */

  __IO uint8_t SHIFTRH; /*!< Shift control High Register  */
  __IO uint8_t SHIFTRL; /*!<  Shift control Low Register  */

  __IO uint8_t ALRMAR1; /*!<  ALARM A  Register 1  */