📄 stm8l15x_i2c.h
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/**
******************************************************************************
* @file stm8l15x_i2c.h
* @author MCD Application Team
* @version V1.5.0
* @date 13-May-2011
* @brief This file contains all the functions prototypes for the I2C firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8L15x_I2C_H
#define __STM8L15x_I2C_H
/* Includes ------------------------------------------------------------------*/
#include "stm8l15x.h"
/** @addtogroup STM8L15x_StdPeriph_Driver
* @{
*/
/** @addtogroup I2C
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup I2C_Exported_Types
* @{
*/
/** @defgroup I2C_mode
* @{
*/
typedef enum
{
I2C_Mode_I2C = (uint8_t)0x00, /*!< I2C mode */
I2C_Mode_SMBusDevice = (uint8_t)0x02, /*!< SMBus Device mode */
I2C_Mode_SMBusHost = (uint8_t)0x0A /*!< SMBus Host mode */
} I2C_Mode_TypeDef;
/**
* @}
*/
/** @defgroup I2C_duty_cycle_in_fast_mode
* @{
*/
typedef enum
{
I2C_DutyCycle_2 = (uint8_t)0x00, /*!< Fast mode Tlow/THigh = 2 */
I2C_DutyCycle_16_9 = (uint8_t)0x40 /*!< Fast mode Tlow/Thigh = 16/9 */
} I2C_DutyCycle_TypeDef;
/**
* @}
*/
/** @defgroup I2C_acknowledgement
* @{
*/
typedef enum
{
I2C_Ack_Disable = (uint8_t)0x00, /*!< No acknowledge */
I2C_Ack_Enable = (uint8_t)0x04 /*!< Acknowledge Enabled */
} I2C_Ack_TypeDef;
/**
* @}
*/
/** @defgroup I2C_Position_Acknowledgement
* @{
*/
typedef enum
{
I2C_AckPosition_Current = (uint8_t)0x00, /*!< Acknowledge on the current byte */
I2C_AckPosition_Next = (uint8_t)0x08 /*!< Acknowledge on the next byte */
} I2C_AckPosition_TypeDef;
/**
* @}
*/
/** @defgroup I2C_acknowledged_address
* @{
*/
typedef enum
{
I2C_AcknowledgedAddress_7bit = (uint8_t)0x00, /*!< 7-bit slave address (10-bit address not acknowledged) */
I2C_AcknowledgedAddress_10bit = (uint8_t)0x80 /*!< 10-bit slave address (7-bit address not acknowledged) */
} I2C_AcknowledgedAddress_TypeDef;
/**
* @}
*/
/** @defgroup I2C_transfer_direction
* @{
*/
/**
* Warning: the values correspond to the ADD0 bit position in the OARL register
*/
typedef enum
{
I2C_Direction_Transmitter = (uint8_t)0x00, /*!< Transmission direction */
I2C_Direction_Receiver = (uint8_t)0x01 /*!< Reception direction */
} I2C_Direction_TypeDef;
/**
* @}
*/
/** @defgroup I2C_SMBus_alert_pin_level
* @{
*/
typedef enum
{
I2C_SMBusAlert_High = (uint8_t)0x00, /*!< SMBAlert pin high */
I2C_SMBusAlert_Low = (uint8_t)0x01 /*!< SMBAlert pin Low */
} I2C_SMBusAlert_TypeDef;
/**
* @}
*/
/** @defgroup I2C_PEC_position
* @{
*/
typedef enum
{
I2C_PECPosition_Current = (uint8_t)0x00, /*!< Current byte in shift register is PEC */
I2C_PECPosition_Next = (uint8_t)0x08 /*!< Next byte in shift register is PEC */
} I2C_PECPosition_TypeDef;
/**
* @}
*/
/** @defgroup I2C_flags_definition
* @{
*/
/**
* @brief Elements values convention: 0xXXYY
* X = SRx registers index
* X = 1 : SR1
* X = 2 : SR2
* X = 3 : SR3
* Y = Flag mask in the register
*/
typedef enum
{
/* SR1 register flags */
I2C_FLAG_TXE = (uint16_t)0x0180, /*!< Transmit Data Register Empty flag */
I2C_FLAG_RXNE = (uint16_t)0x0140, /*!< Read Data Register Not Empty flag */
I2C_FLAG_STOPF = (uint16_t)0x0110, /*!< Stop detected flag */
I2C_FLAG_ADD10 = (uint16_t)0x0108, /*!< 10-bit Header sent flag */
I2C_FLAG_BTF = (uint16_t)0x0104, /*!< Data Byte Transfer Finished flag */
I2C_FLAG_ADDR = (uint16_t)0x0102, /*!< Address Sent/Matched (master/slave) flag */
I2C_FLAG_SB = (uint16_t)0x0101, /*!< Start bit sent flag */
/* SR2 register flags */
I2C_FLAG_SMBALERT = (uint16_t)0x0280, /*!< SMBUS Alert flag */
I2C_FLAG_TIMEOUT = (uint16_t)0x0240, /*!< Time out flag */
I2C_FLAG_WUFH = (uint16_t)0x0220, /*!< Wake Up From Halt flag */
I2C_FLAG_PECERR = (uint16_t)0x0210, /*!< PEC error flag */
I2C_FLAG_OVR = (uint16_t)0x0208, /*!< Overrun/Underrun flag */
I2C_FLAG_AF = (uint16_t)0x0204, /*!< Acknowledge Failure flag */
I2C_FLAG_ARLO = (uint16_t)0x0202, /*!< Arbitration Loss flag */
I2C_FLAG_BERR = (uint16_t)0x0201, /*!< Misplaced Start or Stop condition */
/* SR3 register flags */
I2C_FLAG_DUALF = (uint16_t)0x0380, /*!< DUAL Flag */
I2C_FLAG_SMBHOST = (uint16_t)0x0340, /*!< SMBUS host Flag */
I2C_FLAG_SMBDEFAULT = (uint16_t)0x0320, /*!< SMBUS default flag */
I2C_FLAG_GENCALL = (uint16_t)0x0310, /*!< General Call header received Flag */
I2C_FLAG_TRA = (uint16_t)0x0304, /*!< Transmitter Receiver flag */
I2C_FLAG_BUSY = (uint16_t)0x0302, /*!< Bus Busy flag */
I2C_FLAG_MSL = (uint16_t)0x0301 /*!< Master Slave flag */
} I2C_FLAG_TypeDef;
/**
* @}
*/
/** @defgroup I2C_interrupts_definition
* @{
*/
/**
* @brief I2C Pending bits
* Elements values convention: 0xXYZZ
* X = SRx registers index
* X = 0 : ITR
* X = 1 : SR1
* X = 2 : SR2
* Y = Position of the corresponding Interrupt
* ZZ = flag mask in the dedicated register(X register)
*/
typedef enum
{
I2C_IT_ERR = (uint16_t)0x0001, /*!< Error Interruption */
I2C_IT_EVT = (uint16_t)0x0002, /*!< Event Interruption */
I2C_IT_BUF = (uint16_t)0x0004, /*!< Buffer Interruption */
/* SR1 register*/
I2C_IT_TXE = (uint16_t)0x1680, /*!< Transmit Data Register Empty */
I2C_IT_RXNE = (uint16_t)0x1640, /*!< Read Data Register Not Empty */
I2C_IT_STOPF = (uint16_t)0x1210, /*!< Stop detected */
I2C_IT_ADD10 = (uint16_t)0x1208, /*!< 10-bit Header sent */
I2C_IT_BTF = (uint16_t)0x1204, /*!< Data Byte Transfer Finished */
I2C_IT_ADDR = (uint16_t)0x1202, /*!< Address Sent/Matched (master/slave) */
I2C_IT_SB = (uint16_t)0x1201, /*!< Start bit sent */
/* SR2 register*/
I2C_IT_SMBALERT = (uint16_t)0x2180, /*!< SMBUS alert */
I2C_IT_TIMEOUT = (uint16_t)0x2140, /*!< Time out */
I2C_IT_WUFH = (uint16_t)0x2220, /*!< PEC error */
I2C_IT_PECERR = (uint16_t)0x2110, /*!< Wake Up From Halt */
I2C_IT_OVR = (uint16_t)0x2108, /*!< Overrun/Underrun */
I2C_IT_AF = (uint16_t)0x2104, /*!< Acknowledge Failure */
I2C_IT_ARLO = (uint16_t)0x2102, /*!< Arbitration Loss */
I2C_IT_BERR = (uint16_t)0x2101 /*!< Misplaced Start or Stop condition */
} I2C_IT_TypeDef;
/**
* @}
*/
/** @defgroup I2C_Events
* @{
*/
/**
* @brief I2C possible events
* Values convention: 0xXXYY
* XX = Event SR3 corresponding value
* YY = Event SR1 corresponding value
* @note if Event = EV3_2 the rule above does not apply
* YY = Event SR2 corresponding value
*/
typedef enum
{
/**
===============================================================================
I2C Master Events (Events grouped in order of communication)
===============================================================================
*/
/**
* @brief Communication start
*
* After sending the START condition (I2C_GenerateSTART() function) the master
* has to wait for this event. It means that the Start condition has been correctly
* released on the I2C bus (the bus is free, no other devices is communicating).
*
*/
/* --EV5 */
I2C_EVENT_MASTER_MODE_SELECT = (uint16_t)0x0301, /*!< BUSY, MSL and SB flag */
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