📄 stm8l15x_tim4.ls
字号:
1 ; C Compiler for STM8 (COSMIC Software)
2 ; Parser V4.9.10 - 10 Feb 2011
3 ; Generator (Limited) V4.3.6 - 15 Feb 2011
43 ; 124 void TIM4_DeInit(void)
43 ; 125 {
45 switch .text
46 0000 _TIM4_DeInit:
50 ; 126 TIM4->CR1 = TIM4_CR1_RESET_VALUE;
52 0000 725f52e0 clr 21216
53 ; 127 TIM4->CR2 = TIM4_CR2_RESET_VALUE;
55 0004 725f52e1 clr 21217
56 ; 128 TIM4->SMCR = TIM4_SMCR_RESET_VALUE;
58 0008 725f52e2 clr 21218
59 ; 129 TIM4->IER = TIM4_IER_RESET_VALUE;
61 000c 725f52e4 clr 21220
62 ; 130 TIM4->CNTR = TIM4_CNTR_RESET_VALUE;
64 0010 725f52e7 clr 21223
65 ; 131 TIM4->PSCR = TIM4_PSCR_RESET_VALUE;
67 0014 725f52e8 clr 21224
68 ; 132 TIM4->ARR = TIM4_ARR_RESET_VALUE;
70 0018 35ff52e9 mov 21225,#255
71 ; 133 TIM4->SR1 = TIM4_SR1_RESET_VALUE;
73 001c 725f52e5 clr 21221
74 ; 134 }
77 0020 81 ret
245 ; 159 void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler,
245 ; 160 uint8_t TIM4_Period)
245 ; 161 {
246 switch .text
247 0021 _TIM4_TimeBaseInit:
251 ; 163 assert_param(IS_TIM4_Prescaler(TIM4_Prescaler));
253 ; 165 TIM4->ARR = (uint8_t)(TIM4_Period);
255 0021 9f ld a,xl
256 0022 c752e9 ld 21225,a
257 ; 167 TIM4->PSCR = (uint8_t)(TIM4_Prescaler);
259 0025 9e ld a,xh
260 0026 c752e8 ld 21224,a
261 ; 170 TIM4->EGR = TIM4_EventSource_Update;
263 0029 350152e6 mov 21222,#1
264 ; 171 }
267 002d 81 ret
335 ; 199 void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler,
335 ; 200 TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode)
335 ; 201 {
336 switch .text
337 002e _TIM4_PrescalerConfig:
341 ; 203 assert_param(IS_TIM4_Prescaler_RELOAD(TIM4_PSCReloadMode));
343 ; 204 assert_param(IS_TIM4_Prescaler(Prescaler));
345 ; 207 TIM4->PSCR = (uint8_t) Prescaler;
347 002e 9e ld a,xh
348 002f c752e8 ld 21224,a
349 ; 210 if (TIM4_PSCReloadMode == TIM4_PSCReloadMode_Immediate)
351 0032 9f ld a,xl
352 0033 a101 cp a,#1
353 0035 2606 jrne L141
354 ; 212 TIM4->EGR |= TIM4_EGR_UG ;
356 0037 721052e6 bset 21222,#0
358 003b 2004 jra L341
359 003d L141:
360 ; 216 TIM4->EGR &= (uint8_t)(~TIM4_EGR_UG) ;
362 003d 721152e6 bres 21222,#0
363 0041 L341:
364 ; 218 }
367 0041 81 ret
401 ; 226 void TIM4_SetCounter(uint8_t Counter)
401 ; 227 {
402 switch .text
403 0042 _TIM4_SetCounter:
407 ; 229 TIM4->CNTR = (uint8_t)(Counter);
409 0042 c752e7 ld 21223,a
410 ; 230 }
413 0045 81 ret
447 ; 238 void TIM4_SetAutoreload(uint8_t Autoreload)
447 ; 239 {
448 switch .text
449 0046 _TIM4_SetAutoreload:
453 ; 241 TIM4->ARR = (uint8_t)(Autoreload);
455 0046 c752e9 ld 21225,a
456 ; 242 }
459 0049 81 ret
493 ; 249 uint8_t TIM4_GetCounter(void)
493 ; 250 {
494 switch .text
495 004a _TIM4_GetCounter:
497 004a 88 push a
498 00000001 OFST: set 1
501 ; 251 uint8_t tmpcntr = 0;
503 ; 252 tmpcntr = TIM4->CNTR;
505 004b c652e7 ld a,21223
506 004e 6b01 ld (OFST+0,sp),a
507 ; 254 return ((uint8_t)tmpcntr);
509 0050 7b01 ld a,(OFST+0,sp)
512 0052 5b01 addw sp,#1
513 0054 81 ret
537 ; 278 TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void)
537 ; 279 {
538 switch .text
539 0055 _TIM4_GetPrescaler:
543 ; 281 return ((TIM4_Prescaler_TypeDef)TIM4->PSCR);
545 0055 c652e8 ld a,21224
548 0058 81 ret
604 ; 290 void TIM4_UpdateDisableConfig(FunctionalState NewState)
604 ; 291 {
605 switch .text
606 0059 _TIM4_UpdateDisableConfig:
610 ; 293 assert_param(IS_FUNCTIONAL_STATE(NewState));
612 ; 296 if (NewState != DISABLE)
614 0059 4d tnz a
615 005a 2706 jreq L552
616 ; 298 TIM4->CR1 |= TIM4_CR1_UDIS ;
618 005c 721252e0 bset 21216,#1
620 0060 2004 jra L752
621 0062 L552:
622 ; 302 TIM4->CR1 &= (uint8_t)(~TIM4_CR1_UDIS) ;
624 0062 721352e0 bres 21216,#1
625 0066 L752:
626 ; 304 }
629 0066 81 ret
687 ; 314 void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource)
687 ; 315 {
688 switch .text
689 0067 _TIM4_UpdateRequestConfig:
693 ; 317 assert_param(IS_TIM4_UPDATE_SOURCE(TIM4_UpdateSource));
695 ; 320 if (TIM4_UpdateSource == TIM4_UpdateSource_Regular)
697 0067 a101 cp a,#1
698 0069 2606 jrne L703
699 ; 322 TIM4->CR1 |= TIM4_CR1_URS ;
701 006b 721452e0 bset 21216,#2
703 006f 2004 jra L113
704 0071 L703:
705 ; 326 TIM4->CR1 &= (uint8_t)(~TIM4_CR1_URS) ;
707 0071 721552e0 bres 21216,#2
708 0075 L113:
709 ; 328 }
712 0075 81 ret
748 ; 336 void TIM4_ARRPreloadConfig(FunctionalState NewState)
748 ; 337 {
749 switch .text
750 0076 _TIM4_ARRPreloadConfig:
754 ; 339 assert_param(IS_FUNCTIONAL_STATE(NewState));
756 ; 342 if (NewState != DISABLE)
758 0076 4d tnz a
759 0077 2706 jreq L133
760 ; 344 TIM4->CR1 |= TIM4_CR1_ARPE ;
762 0079 721e52e0 bset 21216,#7
764 007d 2004 jra L333
765 007f L133:
766 ; 348 TIM4->CR1 &= (uint8_t)(~TIM4_CR1_ARPE) ;
768 007f 721f52e0 bres 21216,#7
769 0083 L333:
770 ; 350 }
773 0083 81 ret
830 ; 360 void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode)
830 ; 361 {
831 switch .text
832 0084 _TIM4_SelectOnePulseMode:
836 ; 363 assert_param(IS_TIM4_OPM_MODE(TIM4_OPMode));
838 ; 366 if (TIM4_OPMode == TIM4_OPMode_Single)
840 0084 a101 cp a,#1
841 0086 2606 jrne L363
842 ; 368 TIM4->CR1 |= TIM4_CR1_OPM ;
844 0088 721652e0 bset 21216,#3
846 008c 2004 jra L563
847 008e L363:
848 ; 372 TIM4->CR1 &= (uint8_t)(~TIM4_CR1_OPM) ;
850 008e 721752e0 bres 21216,#3
851 0092 L563:
852 ; 374 }
855 0092 81 ret
890 ; 382 void TIM4_Cmd(FunctionalState NewState)
890 ; 383 {
891 switch .text
892 0093 _TIM4_Cmd:
896 ; 385 assert_param(IS_FUNCTIONAL_STATE(NewState));
898 ; 388 if (NewState != DISABLE)
900 0093 4d tnz a
901 0094 2706 jreq L504
902 ; 390 TIM4->CR1 |= TIM4_CR1_CEN ;
904 0096 721052e0 bset 21216,#0
906 009a 2004 jra L704
907 009c L504:
908 ; 394 TIM4->CR1 &= (uint8_t)(~TIM4_CR1_CEN) ;
910 009c 721152e0 bres 21216,#0
911 00a0 L704:
912 ; 396 }
915 00a0 81 ret
980 ; 424 void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState)
980 ; 425 {
981 switch .text
982 00a1 _TIM4_ITConfig:
984 00a1 89 pushw x
985 00000000 OFST: set 0
988 ; 427 assert_param(IS_TIM4_IT(TIM4_IT));
990 ; 428 assert_param(IS_FUNCTIONAL_STATE(NewState));
992 ; 430 if (NewState != DISABLE)
994 00a2 9f ld a,xl
995 00a3 4d tnz a
996 00a4 2709 jreq L344
997 ; 433 TIM4->IER |= (uint8_t)TIM4_IT;
999 00a6 9e ld a,xh
1000 00a7 ca52e4 or a,21220
1001 00aa c752e4 ld 21220,a
1003 00ad 2009 jra L544
1004 00af L344:
1005 ; 438 TIM4->IER &= (uint8_t)(~(uint8_t)TIM4_IT);
1007 00af 7b01 ld a,(OFST+1,sp)
1008 00b1 43 cpl a
1009 00b2 c452e4 and a,21220
1010 00b5 c752e4 ld 21220,a
1011 00b8 L544:
1012 ; 440 }
1015 00b8 85 popw x
1016 00b9 81 ret
1073 ; 450 void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource)
1073 ; 451 {
1074 switch .text
1075 00ba _TIM4_GenerateEvent:
1079 ; 453 assert_param(IS_TIM4_EVENT_SOURCE((uint8_t)TIM4_EventSource));
1081 ; 456 TIM4->EGR |= (uint8_t)TIM4_EventSource;
1083 00ba ca52e6 or a,21222
1084 00bd c752e6 ld 21222,a
1085 ; 457 }
1088 00c0 81 ret
1174 ; 468 FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG)
1174 ; 469 {
1175 switch .text
1176 00c1 _TIM4_GetFlagStatus:
1178 00c1 88 push a
1179 00000001 OFST: set 1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -