📄 b30core.asm
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;;=============================================================================
;; THis Version For SPLB30 2002/11/21
;; Version: 0.1a
;; Author: WuWenHui
;;=============================================================================
reset:
RESET:
sei
ldx #D_StackTop ;;$ff
txs
lda #0 ;;disable all interrupt
sta R_InterruptImage
sta p_int_ctrl ;;01H
WakeUp:
lda p_WakeUp_Ctrl
ldx #00h ;;clear wakeup source flag
stx p_WakeUp_Ctrl
and #%00001011
beq L_PowerOn?
sta tmp0
;------------------
lda R_Mode
cmp #M_SLEEP_MODE
bne ?no_sleep
jsr F_SetCpuSpeedAndIOB
?no_sleep:
sei
lda #(DC_SPEED0+PWM_CK_SEL)
;; lda #(DC_SPEED1+PWM_CK_SEL)
sta R_LcdClock_Mage
sta P_04H_CPU_CLK_Ctrl
lda #(SET_128HZ+SET_2HZ)
sta p_timer_base
lda #(INT_TBLI+INT_TBHI)
ORA R_InterruptImage
sta R_InterruptImage
sta p_int_ctrl
cli
lda tmp0
and #%00000001
beq ?just_2HZwake_up
lda #4
sta R_DebounceA
ldx #1
jsr F_set_bank_int
jmp MainLoop
?just_2HZwake_up:
ldx #1
jsr F_set_bank_int
jmp MainLoopB
;;========================================================================================
L_PowerOn?:
power_up:
lda #0
sta P_PWM_Ch0Control ;;control port for PWM channel0 and enable E.L. drive
sta P_PWM_Ch1Control ;;control port for PWM channel1 and enable E.L. drive
jsr F_SetCpuSpeedAndIO
ClearRAM:
jsr F_ClearPage0Ram
lda #00H ;;clear $100--$0aff ram
sta R_TableAddLow
lda #01H
sta R_TableAddHigh
?clear_next:
lda #0
ldx #0
sta (R_TableAddLow,x)
inc R_TableAddLow
bne ?clear_next
inc R_TableAddHigh
?not_high:
lda R_TableAddHigh
cmp #0bh
bcc ?clear_next
jsr F_SetCpuSpeedAndIO
jsr F_ClearLcd
jsr F_MelodyInitial
cli
jmp program_start
;;==================================================
;;==================================================
IRQ:
pha ;3
txa ;2
pha
tya
pha
LDA P_InterruptStatus
STA R_InterruptReg
eor R_InterruptImage
sta P_InterruptStatus
lda #$55
sta p_watchdog_clr
lda R_InterruptReg
and #INT_TM0
beq L_NonTimerA
L_TimerAInt:
;; JSR F_IntCh1Service
L_NonTimerA:
lda R_InterruptReg
and #INT_TM1
beq T128hz_init
L_TimerBInt:
;; JSR F_IntCh2Service
;----------------------------------------
T128hz_init:
lda R_InterruptReg
and #INT_TBHI
beq ?no_128Hz
jsr F_ServiceMelody
inc R_Debounce
inc R_DebounceA
lda R_DownTime
beq ?no_128Hz
dec R_DownTime
?no_128Hz
lda R_InterruptReg
and #INT_TBLI
beq ?no_2HZ
lda R_SysFlag
ora #D_POINT_5_SEC
sta R_SysFlag
inc R_Random1
lda R_Random1
and #1
bne ?not_inc_random2
inc R_Random2
?not_inc_random2:
lda R_Random1
and #%00000011
cmp #%00000011
bne ?not_inc_random3
inc R_Random3
?not_inc_random3:
inc R_Second
lda R_Second
and #1
bne ?not_inc_auto_off
lda R_OffTime
cmp #FFH
beq ?not_inc_auto_off
inc R_OffTime
?not_inc_auto_off:
inc R_BeepSecond
lda R_DownSecond
beq ?no_2HZ
dec R_DownSecond
?no_2HZ:
irq_all_exit:
MutePlay:
lda R_InterruptImage
sta P_InterruptStatus
pla
tay
pla ;3
tax ;2
pla ;3 ;save registers
NMI:
rti
;;=============================================================================
F_SetCpuSpeedAndIO:
lda #C32K_CTRL_EN
sta P_0EH_Xcal32KCtrl
lda #(DC_SPEED0+PWM_CK_SEL) ;;clock=FOSC
;; lda #(DC_SPEED1+PWM_CK_SEL) ;;clock=FOSC/2
sta R_LcdClock_Mage
sta P_04H_CPU_CLK_Ctrl
lda #%00010111 ;;4.68v
;; lda #%00011000 ;;5.00v
;; lda #%00010110 ;;4.79v
;; lda #%00010011 ;;4.47v
;; lda #%00011010 ;;5.20v
sta R_VLcd_Ctrl_Mage
jsr F_SetLcdToDisp
lda #0
sta P_TimerCntControl ;;
lda #%10000000
sta p_keyscan_ctrl ;;PortA weak pull-high/low, Seg15-8 and Seg7-0 key scan output disable
;; lda #D_EnLowDet27 ;;2.7V
lda #0 ;;wwhp
sta P_39H_LVD_Ctrl ;;disable Low Voltage
lda #0
sta P_38H_NMI_Ctrl ;;enable NMI
lda #$00
sta P_PortA_Strobe_Pullhigh ;;PortA normal input
jmp F_SetIO
;;=============================================================================
F_SetCpuSpeedAndIOB:
lda #C32K_CTRL_EN
sta P_0EH_Xcal32KCtrl
;; lda #%10000001 ;;low v
lda #0
sta P_38H_NMI_Ctrl
lda #0
sta P_TimerCntControl
lda #%10000000
sta p_keyscan_ctrl
;;lda #$ff
lda #$00
sta P_PortA_Strobe_Pullhigh ;;PortA normal input
jmp F_SetIO
;;=============================================================================
F_SetIO:
lda #%00000000 ;;0: input 1:output
sta p_portA_dir_ctrl
lda #%00000000 ;;0: pull low 1:pull high
sta p_portA_config ;;$06
lda #%11111111
sta p_portA
;;------------------------
lda #%11111111 ;;0: input 1:output
sta p_portB_dir_ctrl
lda #%00000000 ;;0: buffer when it is output
sta p_portB_config
lda #%11111111
sta p_portB
;;------PortCDType--------
lda #%00000000
sta p_portCD_config ;;all set to be IO porrt
;-----------------------------------------------------------------------
lda #%11111111 ;;1: output
sta p_portC_dir_ctrl
lda #%00000000 ;;0: buffer when it is output
sta p_portC_config
lda #%00000000 ;;
sta p_portC ;;
;;------------------------
lda #%00111111
sta p_portD_dir_ctrl
lda #%00000000
sta p_portD_config
lda #%00000000
sta p_portD
;;-------------------------
lda #(SET_128HZ+SET_2HZ)
sta P_0CH_TimeBaseSelect
lda #(INT_TBLI+INT_TBHI)
ORA R_InterruptImage
sta R_InterruptImage
sta p_int_ctrl
rts
;;=============================================================================
F_SetLcdToDisp:
lda R_VLcd_Ctrl_Mage
sta P_26H_VLCD_voltage_ctrl
lda #(LCD_PUMP_EN+PUMP_CLK_32HZ) ;;
sta P_25H_pump_control
;; lda #(LCD_DUTY16+LCD_BIAS5+LCD_COMM_EN+LCD_STRB_EN) ;;16 duty and 1/5 bias
lda #(LCD_DUTY16+LCD_BIAS5+LCD_COMM_EN) ;;16 duty and 1/5 bias
sta P_24H_LCD_option
rts
;;=============================================================================
F_TurnOffLcdDisp:
lda #0
sta P_25H_pump_control
lda #(LCD_DUTY16+LCD_BIAS5+LCD_ALL_OFF) ;;+LCD_STRB_EN)
sta P_24H_LCD_option
rts
;;=============================================================================
F_ClearPage0Ram:
ldx #FFH ;;clear $40--$ff ram
lda #0
?ClearRAM:
sta 00H,X
dex
cpx #40H
bcs ?ClearRAM
rts
;;=============================================================================
.include melody.asm
;;=============================================================================
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