📄 kinetis_flexcan.h
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#define FLEXCAN_RXIMR9_MI26 (0x04000000)
#define FLEXCAN_RXIMR9_MI27 (0x08000000)
#define FLEXCAN_RXIMR9_MI28 (0x10000000)
#define FLEXCAN_RXIMR9_MI29 (0x20000000)
#define FLEXCAN_RXIMR9_MI30 (0x40000000)
#define FLEXCAN_RXIMR9_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR10 */
#define FLEXCAN_RXIMR10_MI0 (0x00000001)
#define FLEXCAN_RXIMR10_MI1 (0x00000002)
#define FLEXCAN_RXIMR10_MI2 (0x00000004)
#define FLEXCAN_RXIMR10_MI3 (0x00000008)
#define FLEXCAN_RXIMR10_MI4 (0x00000010)
#define FLEXCAN_RXIMR10_MI5 (0x00000020)
#define FLEXCAN_RXIMR10_MI6 (0x00000040)
#define FLEXCAN_RXIMR10_MI7 (0x00000080)
#define FLEXCAN_RXIMR10_MI8 (0x00000100)
#define FLEXCAN_RXIMR10_MI9 (0x00000200)
#define FLEXCAN_RXIMR10_MI10 (0x00000400)
#define FLEXCAN_RXIMR10_MI11 (0x00000800)
#define FLEXCAN_RXIMR10_MI12 (0x00001000)
#define FLEXCAN_RXIMR10_MI13 (0x00002000)
#define FLEXCAN_RXIMR10_MI14 (0x00004000)
#define FLEXCAN_RXIMR10_MI15 (0x00008000)
#define FLEXCAN_RXIMR10_MI16 (0x00010000)
#define FLEXCAN_RXIMR10_MI17 (0x00020000)
#define FLEXCAN_RXIMR10_MI18 (0x00040000)
#define FLEXCAN_RXIMR10_MI19 (0x00080000)
#define FLEXCAN_RXIMR10_MI20 (0x00100000)
#define FLEXCAN_RXIMR10_MI21 (0x00200000)
#define FLEXCAN_RXIMR10_MI22 (0x00400000)
#define FLEXCAN_RXIMR10_MI23 (0x00800000)
#define FLEXCAN_RXIMR10_MI24 (0x01000000)
#define FLEXCAN_RXIMR10_MI25 (0x02000000)
#define FLEXCAN_RXIMR10_MI26 (0x04000000)
#define FLEXCAN_RXIMR10_MI27 (0x08000000)
#define FLEXCAN_RXIMR10_MI28 (0x10000000)
#define FLEXCAN_RXIMR10_MI29 (0x20000000)
#define FLEXCAN_RXIMR10_MI30 (0x40000000)
#define FLEXCAN_RXIMR10_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR11 */
#define FLEXCAN_RXIMR11_MI0 (0x00000001)
#define FLEXCAN_RXIMR11_MI1 (0x00000002)
#define FLEXCAN_RXIMR11_MI2 (0x00000004)
#define FLEXCAN_RXIMR11_MI3 (0x00000008)
#define FLEXCAN_RXIMR11_MI4 (0x00000010)
#define FLEXCAN_RXIMR11_MI5 (0x00000020)
#define FLEXCAN_RXIMR11_MI6 (0x00000040)
#define FLEXCAN_RXIMR11_MI7 (0x00000080)
#define FLEXCAN_RXIMR11_MI8 (0x00000100)
#define FLEXCAN_RXIMR11_MI9 (0x00000200)
#define FLEXCAN_RXIMR11_MI10 (0x00000400)
#define FLEXCAN_RXIMR11_MI11 (0x00000800)
#define FLEXCAN_RXIMR11_MI12 (0x00001000)
#define FLEXCAN_RXIMR11_MI13 (0x00002000)
#define FLEXCAN_RXIMR11_MI14 (0x00004000)
#define FLEXCAN_RXIMR11_MI15 (0x00008000)
#define FLEXCAN_RXIMR11_MI16 (0x00010000)
#define FLEXCAN_RXIMR11_MI17 (0x00020000)
#define FLEXCAN_RXIMR11_MI18 (0x00040000)
#define FLEXCAN_RXIMR11_MI19 (0x00080000)
#define FLEXCAN_RXIMR11_MI20 (0x00100000)
#define FLEXCAN_RXIMR11_MI21 (0x00200000)
#define FLEXCAN_RXIMR11_MI22 (0x00400000)
#define FLEXCAN_RXIMR11_MI23 (0x00800000)
#define FLEXCAN_RXIMR11_MI24 (0x01000000)
#define FLEXCAN_RXIMR11_MI25 (0x02000000)
#define FLEXCAN_RXIMR11_MI26 (0x04000000)
#define FLEXCAN_RXIMR11_MI27 (0x08000000)
#define FLEXCAN_RXIMR11_MI28 (0x10000000)
#define FLEXCAN_RXIMR11_MI29 (0x20000000)
#define FLEXCAN_RXIMR11_MI30 (0x40000000)
#define FLEXCAN_RXIMR11_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR12 */
#define FLEXCAN_RXIMR12_MI0 (0x00000001)
#define FLEXCAN_RXIMR12_MI1 (0x00000002)
#define FLEXCAN_RXIMR12_MI2 (0x00000004)
#define FLEXCAN_RXIMR12_MI3 (0x00000008)
#define FLEXCAN_RXIMR12_MI4 (0x00000010)
#define FLEXCAN_RXIMR12_MI5 (0x00000020)
#define FLEXCAN_RXIMR12_MI6 (0x00000040)
#define FLEXCAN_RXIMR12_MI7 (0x00000080)
#define FLEXCAN_RXIMR12_MI8 (0x00000100)
#define FLEXCAN_RXIMR12_MI9 (0x00000200)
#define FLEXCAN_RXIMR12_MI10 (0x00000400)
#define FLEXCAN_RXIMR12_MI11 (0x00000800)
#define FLEXCAN_RXIMR12_MI12 (0x00001000)
#define FLEXCAN_RXIMR12_MI13 (0x00002000)
#define FLEXCAN_RXIMR12_MI14 (0x00004000)
#define FLEXCAN_RXIMR12_MI15 (0x00008000)
#define FLEXCAN_RXIMR12_MI16 (0x00010000)
#define FLEXCAN_RXIMR12_MI17 (0x00020000)
#define FLEXCAN_RXIMR12_MI18 (0x00040000)
#define FLEXCAN_RXIMR12_MI19 (0x00080000)
#define FLEXCAN_RXIMR12_MI20 (0x00100000)
#define FLEXCAN_RXIMR12_MI21 (0x00200000)
#define FLEXCAN_RXIMR12_MI22 (0x00400000)
#define FLEXCAN_RXIMR12_MI23 (0x00800000)
#define FLEXCAN_RXIMR12_MI24 (0x01000000)
#define FLEXCAN_RXIMR12_MI25 (0x02000000)
#define FLEXCAN_RXIMR12_MI26 (0x04000000)
#define FLEXCAN_RXIMR12_MI27 (0x08000000)
#define FLEXCAN_RXIMR12_MI28 (0x10000000)
#define FLEXCAN_RXIMR12_MI29 (0x20000000)
#define FLEXCAN_RXIMR12_MI30 (0x40000000)
#define FLEXCAN_RXIMR12_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR13 */
#define FLEXCAN_RXIMR13_MI0 (0x00000001)
#define FLEXCAN_RXIMR13_MI1 (0x00000002)
#define FLEXCAN_RXIMR13_MI2 (0x00000004)
#define FLEXCAN_RXIMR13_MI3 (0x00000008)
#define FLEXCAN_RXIMR13_MI4 (0x00000010)
#define FLEXCAN_RXIMR13_MI5 (0x00000020)
#define FLEXCAN_RXIMR13_MI6 (0x00000040)
#define FLEXCAN_RXIMR13_MI7 (0x00000080)
#define FLEXCAN_RXIMR13_MI8 (0x00000100)
#define FLEXCAN_RXIMR13_MI9 (0x00000200)
#define FLEXCAN_RXIMR13_MI10 (0x00000400)
#define FLEXCAN_RXIMR13_MI11 (0x00000800)
#define FLEXCAN_RXIMR13_MI12 (0x00001000)
#define FLEXCAN_RXIMR13_MI13 (0x00002000)
#define FLEXCAN_RXIMR13_MI14 (0x00004000)
#define FLEXCAN_RXIMR13_MI15 (0x00008000)
#define FLEXCAN_RXIMR13_MI16 (0x00010000)
#define FLEXCAN_RXIMR13_MI17 (0x00020000)
#define FLEXCAN_RXIMR13_MI18 (0x00040000)
#define FLEXCAN_RXIMR13_MI19 (0x00080000)
#define FLEXCAN_RXIMR13_MI20 (0x00100000)
#define FLEXCAN_RXIMR13_MI21 (0x00200000)
#define FLEXCAN_RXIMR13_MI22 (0x00400000)
#define FLEXCAN_RXIMR13_MI23 (0x00800000)
#define FLEXCAN_RXIMR13_MI24 (0x01000000)
#define FLEXCAN_RXIMR13_MI25 (0x02000000)
#define FLEXCAN_RXIMR13_MI26 (0x04000000)
#define FLEXCAN_RXIMR13_MI27 (0x08000000)
#define FLEXCAN_RXIMR13_MI28 (0x10000000)
#define FLEXCAN_RXIMR13_MI29 (0x20000000)
#define FLEXCAN_RXIMR13_MI30 (0x40000000)
#define FLEXCAN_RXIMR13_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR14 */
#define FLEXCAN_RXIMR14_MI0 (0x00000001)
#define FLEXCAN_RXIMR14_MI1 (0x00000002)
#define FLEXCAN_RXIMR14_MI2 (0x00000004)
#define FLEXCAN_RXIMR14_MI3 (0x00000008)
#define FLEXCAN_RXIMR14_MI4 (0x00000010)
#define FLEXCAN_RXIMR14_MI5 (0x00000020)
#define FLEXCAN_RXIMR14_MI6 (0x00000040)
#define FLEXCAN_RXIMR14_MI7 (0x00000080)
#define FLEXCAN_RXIMR14_MI8 (0x00000100)
#define FLEXCAN_RXIMR14_MI9 (0x00000200)
#define FLEXCAN_RXIMR14_MI10 (0x00000400)
#define FLEXCAN_RXIMR14_MI11 (0x00000800)
#define FLEXCAN_RXIMR14_MI12 (0x00001000)
#define FLEXCAN_RXIMR14_MI13 (0x00002000)
#define FLEXCAN_RXIMR14_MI14 (0x00004000)
#define FLEXCAN_RXIMR14_MI15 (0x00008000)
#define FLEXCAN_RXIMR14_MI16 (0x00010000)
#define FLEXCAN_RXIMR14_MI17 (0x00020000)
#define FLEXCAN_RXIMR14_MI18 (0x00040000)
#define FLEXCAN_RXIMR14_MI19 (0x00080000)
#define FLEXCAN_RXIMR14_MI20 (0x00100000)
#define FLEXCAN_RXIMR14_MI21 (0x00200000)
#define FLEXCAN_RXIMR14_MI22 (0x00400000)
#define FLEXCAN_RXIMR14_MI23 (0x00800000)
#define FLEXCAN_RXIMR14_MI24 (0x01000000)
#define FLEXCAN_RXIMR14_MI25 (0x02000000)
#define FLEXCAN_RXIMR14_MI26 (0x04000000)
#define FLEXCAN_RXIMR14_MI27 (0x08000000)
#define FLEXCAN_RXIMR14_MI28 (0x10000000)
#define FLEXCAN_RXIMR14_MI29 (0x20000000)
#define FLEXCAN_RXIMR14_MI30 (0x40000000)
#define FLEXCAN_RXIMR14_MI31 (0x80000000)
/* Bit definitions and macros for FLEXCAN_RXIMR15 */
#define FLEXCAN_RXIMR15_MI0 (0x00000001)
#define FLEXCAN_RXIMR15_MI1 (0x00000002)
#define FLEXCAN_RXIMR15_MI2 (0x00000004)
#define FLEXCAN_RXIMR15_MI3 (0x00000008)
#define FLEXCAN_RXIMR15_MI4 (0x00000010)
#define FLEXCAN_RXIMR15_MI5 (0x00000020)
#define FLEXCAN_RXIMR15_MI6 (0x00000040)
#define FLEXCAN_RXIMR15_MI7 (0x00000080)
#define FLEXCAN_RXIMR15_MI8 (0x00000100)
#define FLEXCAN_RXIMR15_MI9 (0x00000200)
#define FLEXCAN_RXIMR15_MI10 (0x00000400)
#define FLEXCAN_RXIMR15_MI11 (0x00000800)
#define FLEXCAN_RXIMR15_MI12 (0x00001000)
#define FLEXCAN_RXIMR15_MI13 (0x00002000)
#define FLEXCAN_RXIMR15_MI14 (0x00004000)
#define FLEXCAN_RXIMR15_MI15 (0x00008000)
#define FLEXCAN_RXIMR15_MI16 (0x00010000)
#define FLEXCAN_RXIMR15_MI17 (0x00020000)
#define FLEXCAN_RXIMR15_MI18 (0x00040000)
#define FLEXCAN_RXIMR15_MI19 (0x00080000)
#define FLEXCAN_RXIMR15_MI20 (0x00100000)
#define FLEXCAN_RXIMR15_MI21 (0x00200000)
#define FLEXCAN_RXIMR15_MI22 (0x00400000)
#define FLEXCAN_RXIMR15_MI23 (0x00800000)
#define FLEXCAN_RXIMR15_MI24 (0x01000000)
#define FLEXCAN_RXIMR15_MI25 (0x02000000)
#define FLEXCAN_RXIMR15_MI26 (0x04000000)
#define FLEXCAN_RXIMR15_MI27 (0x08000000)
#define FLEXCAN_RXIMR15_MI28 (0x10000000)
#define FLEXCAN_RXIMR15_MI29 (0x20000000)
#define FLEXCAN_RXIMR15_MI30 (0x40000000)
#define FLEXCAN_RXIMR15_MI31 (0x80000000)
/* Bit definitions for CRC register */
#define FLEXCAN_CRCR_MBCRC_BIT_NO (16)
#define FLEXCAN_CRCR_MBCRC_MASK (0x007F0000)
#define FLEXCAN_CRCR_CRC_BIT_NO (0)
#define FLEXCAN_CRCR_CRC_MASK (0x00007FFF)
/* Bit definition for Individual Matching Elements Update Register (IMEUR) */
#define FLEXCAN_IMEUR_IMEUP_MASK (0x0000007F)
#define FLEXCAN_IMEUR_IMEUP_BIT_NO (0)
#define FLEXCAN_IMEUR_IMEUREQ_MASK (0x00000100)
#define FLEXCAN_IMEUR_IMEUACK_MASK (0x00000200)
#define FLEXCAN_Set_IMEUP(imeur,imeup) imeur = (imeur & ~(FLEXCAN_IMEUR_IMEUP_MASK)) | (imeup & FLEXCAN_IMEUR_IMEUP_MASK)
#define FLEXCAN_Get_IMEUP(imeur) (imeur & FLEXCAN_IMEUR_IMEUP_MASK)
/* Bit definition for Lost Rx Frames Register (LRFR)
*/
#define FLEXCAN_LRFR_LOSTRLP_MASK (0x007F0000)
#define FLEXCAN_LRFR_LFIFOMTC_MASK (0x00008000)
#define FLEXCAN_LRFR_LOSTRMP_MASK (0x000001FF)
#define FLEXCAN_LRFR_LOSTRLP_BIT_NO (16)
#define FLEXCAN_LRFR_LFIFOMTC_BIT_NO (15)
#define FLEXCAN_LRFR_LOSTRMP_BIT_NO (0)
#define FLEXCAN_Get_LostMBLocked(lrfr) ((lrfr & FLEXCAN_LRFR_LOSTRLP_MASK)>>(FLEXCAN_LRFR_LOSTRLP_BIT_NO))
#define FLEXCAN_Get_LostMBUpdated(lrfr) ((lrfr & FLEXCAN_LRFR_LOSTRMP_MASK))
/* Bit definition for Memory Error Control Register */
#define FLEXCAN_MECR_NCEFAFRZ_MASK (0x00000080)
#define FLEXCAN_MECR_RERRDIS_MASK (0x00000100)
#define FLEXCAN_MECR_EXTERRIE_MAKS (0x00002000)
#define FLEXCAN_MECR_FAERRIE_MAKS (0x00004000)
#define FLEXCAN_MECR_HAERRIE_MAKS (0x00008000)
#define FLEXCAN_MECR_CEI_MSK_MAKS (0x00010000)
#define FLEXCAN_MECR_FANCEI_MSK_MAKS (0x00040000)
#define FLEXCAN_MECR_HANCEI_MSK_MAKS (0x00080000)
#define FLEXCAN_MECR_ECRWRDIS_MSK_MAKS (0x80000000)
/* Bit definition for Error Report Address Register (RERRAR) */
#define FLEXCAN_RERRAR_NCE_MASK (0x01000000)
#define FLEXCAN_RERRAR_SAID_MASK (0x00070000)
#define FLEXCAN_ERRADDR_MASK (0x00003FFF)
/* Bit definition for Error Report Syndrome Register (RERRSYNR) */
#define FLEXCAN_RERRSYNR_BE3_MASK (0x80000000)
#define FLEXCAN_RERRSYNR_SYND3_MASK (0x1F000000)
#define FLEXCAN_RERRSYNR_SYND3_BIT_NO (24)
#define FLEXCAN_RERRSYNR_BE2_MASK (0x00800000)
#define FLEXCAN_RERRSYNR_SYND2_MASK (0x001F0000)
#define FLEXCAN_RERRSYNR_SYND2_BIT_NO (16)
#define FLEXCAN_RERRSYNR_BE1_MASK (0x00008000)
#define FLEXCAN_RERRSYNR_SYND1_MASK (0x00001F00)
#define FLEXCAN_RERRSYNR_SYND1_BIT_NO (8)
#define FLEXCAN_RERRSYNR_BE0_MASK (0x00000080)
#define FLEXCAN_RERRSYNR_SYND0_MASK (0x0000001F)
#define FLEXCAN_RERRSYNR_SYND0_BIT_NO (0)
#define FLEXCAN_RERRSYNR_check_BEn_Bit(errsynr,n) (errsynr & FLEXCAN_RERRSYNR_BE##n##_MASK)
#define FLEXCAN_RERRSYNR_get_SYNDn(errsynr,n) (errsynr & FLEXCAN_RERRSYNR_BE##n##_MASK)
#if 0 //CW
#define FLEXCAN_RERRSYNR_check_BEn_Bit(errsynr,n) ((errsynr & FLEXCAN_RERRSYNR_BE##n##_MASK)>>FLEXCAN_RERRSYNR_SYND##n##_BIT_NO)
#endif //CW
/* Bit definition for Error Status Register (ERRSR) */
#define FLEXCAN_ERRSR_CEIOF_MASK (0x00000001)
#define FLEXCAN_ERRSR_FANCEIOF_MASK (0x00000004)
#define FLEXCAN_ERRSR_HANCEIOF_MASK (0x00000008)
#define FLEXCAN_ERRSR_CEIF_MASK (0x00010000)
#define FLEXCAN_ERRSR_FANCEIF_MASK (0x00040000)
#define FLEXCAN_ERRSR_HANCEIF_MASK (0x00080000)
/********************************************************************/
#endif // __KINETIS_FLEXCAN_H
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