pgtable.h

嵌入式ARM的一些源代码

/* * Last edited: Nov  7 23:44 1995 (cort) */
#ifndef _PPC_PGTABLE_H
#define _PPC_PGTABLE_H

#include <asm/page.h>
#include <asm/mmu.h>

/*
 * Memory management on the PowerPC is a software emulation of the i386
 * MMU folded onto the PowerPC hardware MMU.  The emulated version looks
 * and behaves like the two-level i386 MMU.  Entries from these tables
 * are merged into the PowerPC hashed MMU tables, on demand, treating the
 * hashed tables like a special cache.
 *
 * Since the PowerPC does not have separate kernel and user address spaces,
 * the user virtual address space must be a [proper] subset of the kernel
 * space.  Thus, all tasks will have a specific virtual mapping for the
 * user virtual space and a common mapping for the kernel space.  The
 * simplest way to split this was literally in half.  Also, life is so
 * much simpler for the kernel if the machine hardware resources are
 * always mapped in.  Thus, some additional space is given up to the
 * kernel space to accommodate this.
 *
 * CAUTION! Some of the trade-offs make sense for the PreP platform on
 * which this code was originally developed.  When it migrates to other
 * PowerPC environments, some of the assumptions may fail and the whole
 * setup may need to be reevaluated.
 *
 * On the PowerPC, page translations are kept in a hashed table.  There
 * is exactly one of these tables [although the architecture supports
 * an arbitrary number].  Page table entries move in/out of this hashed
 * structure on demand, with the kernel filling in entries as they are
 * needed.  Just where a page table entry hits in the hashed table is a
 * function of the hashing which is in turn based on the upper 4 bits
 * of the logical address.  These 4 bits address a "virtual segment id"
 * which is unique per task/page combination for user addresses and
 * fixed for the kernel addresses.  Thus, the kernel space can be simply
 * shared [indeed at low overhead] among all tasks.
 *
 * The basic virtual address space is thus:
 *
 * 0x0XXXXXX  --+
 * 0x1XXXXXX    |
 * 0x2XXXXXX    |  User address space. 
 * 0x3XXXXXX    |
 * 0x4XXXXXX    |
 * 0x5XXXXXX    |
 * 0x6XXXXXX    |
 * 0x7XXXXXX  --+
 * 0x8XXXXXX       PCI/ISA I/O space
 * 0x9XXXXXX  --+
 * 0xAXXXXXX    |  Kernel virtual memory
 * 0xBXXXXXX  --+
 * 0xCXXXXXX       PCI/ISA Memory space
 * 0xDXXXXXX
 * 0xEXXXXXX
 * 0xFXXXXXX       Board I/O space
 *
 * CAUTION!  One of the real problems here is keeping the software
 * managed tables coherent with the hardware hashed tables.  When
 * the software decides to update the table, it's normally easy to
 * update the hardware table.  But when the hardware tables need
 * changed, e.g. as the result of a page fault, it's more difficult
 * to reflect those changes back into the software entries.  Currently,
 * this process is quite crude, with updates causing the entire set
 * of tables to become invalidated.  Some performance could certainly
 * be regained by improving this.
 *
 * The Linux memory management assumes a three-level page table setup. On
 * the i386, we use that, but "fold" the mid level into the top-level page
 * table, so that we physically have the same two-level page table as the
 * i386 mmu expects.
 *
 * This file contains the functions and defines necessary to modify and use
 * the i386 page table tree.
 */

/* PMD_SHIFT determines the size of the area a second-level page table can map */
#define PMD_SHIFT	22
#define PMD_SIZE	(1UL << PMD_SHIFT)
#define PMD_MASK	(~(PMD_SIZE-1))

/* PGDIR_SHIFT determines what a third-level page table entry can map */
#define PGDIR_SHIFT	22
#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

/*
 * entries per page directory level: the i386 is two-level, so
 * we don't really have any PMD directory physically.
 */
#define PTRS_PER_PTE	1024
#define PTRS_PER_PMD	1
#define PTRS_PER_PGD	1024

/* Just any arbitrary offset to the start of the vmalloc VM area: the
 * current 8MB value just means that there will be a 8MB "hole" after the
 * physical memory until the kernel virtual memory starts.  That means that
 * any out-of-bounds memory accesses will hopefully be caught.
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;)
 */
#define VMALLOC_OFFSET	(8*1024*1024)
#define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))

#define _PAGE_PRESENT	0x001
#define _PAGE_RW	0x002
#define _PAGE_USER	0x004
#define _PAGE_PCD	0x010
#define _PAGE_ACCESSED	0x020
#define _PAGE_DIRTY	0x040
#define _PAGE_COW	0x200	/* implemented in software (one of the AVL bits) */
#define _PAGE_NO_CACHE	0x400

#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
#define _PAGE_CHG_MASK	(PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)

#define PAGE_NONE	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_COW)
#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
#define PAGE_KERNEL_NO_CACHE	__pgprot(_PAGE_NO_CACHE | _PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)

/*
 * The i386 can't do page protection for execute, and considers that the same are read.
 * Also, write permissions imply read permissions. This is the closest we can get..
 */
#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY
#define __P101	PAGE_READONLY
#define __P110	PAGE_COPY
#define __P111	PAGE_COPY

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY
#define __S101	PAGE_READONLY
#define __S110	PAGE_SHARED
#define __S111	PAGE_SHARED

/*
 * TLB invalidation:
 *
 *  - invalidate() invalidates the current mm struct TLBs
 *  - invalidate_all() invalidates all processes TLBs
 *  - invalidate_mm(mm) invalidates the specified mm context TLB's
 *  - invalidate_page(mm, vmaddr) invalidates one page
 *  - invalidate_range(mm, start, end) invalidates a range of pages
 *
 * FIXME: This could be done much better!
 */

#define invalidate_all() printk("invalidate_all()\n");invalidate()
#if 0
#define invalidate_mm(mm_struct) \
do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_mm(%x)\n", mm_struct);} while (0)
#define invalidate_page(mm_struct,addr) \
do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_page(%x,%x)\n", mm_struct, addr);} while (0)
#define invalidate_range(mm_struct,start,end) \
do { if ((mm_struct) == current->mm) invalidate(); else printk("Can't invalidate_range(%x,%x,%x)\n", mm_struct, start, end);} while (0)
#endif

/*
 * Define this if things work differently on a i386 and a i486:
 * it will (on a i486) warn about kernel memory accesses that are
 * done without a 'verify_area(VERIFY_WRITE,..)'
 */
#undef CONFIG_TEST_VERIFY_AREA

/* page table for 0-4MB for everybody */
extern unsigned long pg0[1024];

/*
 * BAD_PAGETABLE is used when we need a bogus page-table, while
 * BAD_PAGE is used for a bogus page.
 *
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern pte_t __bad_page(void);
extern pte_t * __bad_pagetable(void);

extern unsigned long __zero_page(void);

#define BAD_PAGETABLE __bad_pagetable()
#define BAD_PAGE __bad_page()
#define ZERO_PAGE __zero_page()

/* number of bits that fit into a memory pointer */
#define BITS_PER_PTR			(8*sizeof(unsigned long))

/* to align the pointer to a pointer address */
#define PTR_MASK			(~(sizeof(void*)-1))

/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
/* 64-bit machines, beware!  SRB. */
#define SIZEOF_PTR_LOG2			2

/* to find an entry in a page-table */
#define PAGE_PTR(address) \
((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)

/* to set the page-dir */
/* tsk is a task_struct and pgdir is a pte_t */
#define SET_PAGE_DIR(tsk,pgdir) \
do { \
	(tsk)->tss.pg_tables = (unsigned long *)(pgdir); \
	if ((tsk) == current) \
	{ \
/*_printk("Change page tables = %x\n", pgdir);*/ \
	} \
} while (0)

extern unsigned long high_memory;

extern inline int pte_none(pte_t pte)		{ return !pte_val(pte); }
extern inline int pte_present(pte_t pte)	{ return pte_val(pte) & _PAGE_PRESENT; }
#if 0
extern inline int pte_inuse(pte_t *ptep)	{ return mem_map[MAP_NR(ptep)].reserved; }
/*extern inline int pte_inuse(pte_t *ptep)	{ return mem_map[MAP_NR(ptep)] != 1; }*/
#endif
extern inline void pte_clear(pte_t *ptep)	{ pte_val(*ptep) = 0; }
#if 0
extern inline void pte_reuse(pte_t * ptep)
{
	if (!mem_map[MAP_NR(ptep)].reserved)
		mem_map[MAP_NR(ptep)].count++;
}
#endif
/*
   extern inline void pte_reuse(pte_t * ptep)
{
	if (!(mem_map[MAP_NR(ptep)] & MAP_PAGE_RESERVED))
		mem_map[MAP_NR(ptep)]++;
}
*/
extern inline int pmd_none(pmd_t pmd)		{ return !pmd_val(pmd); }
extern inline int pmd_bad(pmd_t pmd)		{ return (pmd_val(pmd) & ~PAGE_MASK) != _PAGE_TABLE; }
extern inline int pmd_present(pmd_t pmd)	{ return pmd_val(pmd) & _PAGE_PRESENT; }
extern inline int pmd_inuse(pmd_t *pmdp)	{ return 0; }
extern inline void pmd_clear(pmd_t * pmdp)	{ pmd_val(*pmdp) = 0; }
extern inline void pmd_reuse(pmd_t * pmdp)	{ }

/*
 * The "pgd_xxx()" functions here are trivial for a folded two-level
 * setup: the pgd is never bad, and a pmd always exists (as it's folded
 * into the pgd entry)
 */
extern inline int pgd_none(pgd_t pgd)		{ return 0; }
extern inline int pgd_bad(pgd_t pgd)		{ return 0; }
extern inline int pgd_present(pgd_t pgd)	{ return 1; }
#if 0
/*extern inline int pgd_inuse(pgd_t * pgdp)	{ return mem_map[MAP_NR(pgdp)] != 1; }*/
extern inline int pgd_inuse(pgd_t *pgdp)	{ return mem_map[MAP_NR(pgdp)].reserved;  }
#endif
extern inline void pgd_clear(pgd_t * pgdp)	{ }

/*
extern inline void pgd_reuse(pgd_t * pgdp)
{