atarihw.h

嵌入式ARM的一些源代码

/*
** linux/atarihw.h -- This header defines some macros and pointers for
**                    the various Atari custom hardware registers.
**
** Copyright 1994 by Bj攔n Brauel
**
** 5/1/94 Roman Hodek:
**   Added definitions for TT specific chips.
**
** This file is subject to the terms and conditions of the GNU General Public
** License.  See the file COPYING in the main directory of this archive
** for more details.
**
*/

#ifndef _LINUX_ATARIHW_H_
#define _LINUX_ATARIHW_H_

#include <linux/types.h>

/* Reading the MFP port register gives a machine independent delay, since the
 * MFP always has a 8 MHz clock. This avoids problems with the varying length
 * of nops on various machines. Somebody claimed that the tstb takes 600 ns.
 */
#define	MFPDELAY() \
	__asm__ __volatile__ ( "tstb %0" : : "m" (mfp.par_dt_reg) : "cc" );

/* Memory used for screen ram and stdma buffers */
void atari_stram_init (void);
void *atari_stram_alloc (long size, unsigned long *start_mem );
void atari_stram_free (void *);

extern int is_medusa;

/* Do cache push/invalidate for DMA read/write. This function obeys the
 * snooping on some machines (Medusa) and processors: The Medusa itself can
 * snoop, but only the '040 can source data from its cache to DMA writes i.e.,
 * reads from memory). Both '040 and '060 invalidate cache entries on snooped
 * DMA reads (i.e., writes to memory).
 */

#include <linux/mm.h>
#include <asm/pgtable.h>

static inline void dma_cache_maintenance( unsigned long paddr,
					  unsigned long len,
					  int writeflag )

{
	if (writeflag) {
		if (!is_medusa || m68k_is040or060 == 6)
			cache_push( paddr, len );
	}
	else {
		if (!is_medusa)
			cache_clear( paddr, len );
	}
}


/* 
** Shifter  
 */
#define ST_LOW  0
#define ST_MID  1
#define ST_HIGH 2
#define TT_LOW  7
#define TT_MID  4
#define TT_HIGH 6

#define SHF_BAS (0xffff8200)    
struct SHIFTER 
 {
 	u_char pad1;
	u_char bas_hi;
	u_char pad2;
	u_char bas_md;
	u_char pad3;
	u_char volatile vcounthi;
 	u_char pad4;
 	u_char volatile vcountmid;
 	u_char pad5;
 	u_char volatile vcountlow;
 	u_char volatile syncmode;
 	u_char pad6;
 	u_char pad7; 
	u_char bas_lo;
 };
# define shifter ((*(volatile struct SHIFTER *)SHF_BAS))

#define SHF_FBAS (0xffff820e)
struct SHIFTER_F030
 {
  u_short off_next;
  u_short scn_width;
 };                             
# define shifter_f030 ((*(volatile struct SHIFTER_F030 *)SHF_FBAS))


#define	SHF_TBAS (0xffff8200)
struct SHIFTER_TT {
	u_char	char_dummy0;
	u_char	bas_hi;			/* video mem base addr, high and mid byte */
	u_char	char_dummy1;
	u_char	bas_md;
	u_char	char_dummy2;
	u_char	vcount_hi;		/* pointer to currently displayed byte */
	u_char	char_dummy3;
	u_char	vcount_md;
	u_char	char_dummy4;
	u_char	vcount_lo;
	u_short	st_sync;		/* ST compatible sync mode register, unused */
	u_char	char_dummy5;
	u_char	bas_lo;			/* video mem addr, low byte */
	u_char	char_dummy6[2+3*16];
	/* $ffff8240: */
	u_short	color_reg[16];	/* 16 color registers */
	u_char	st_shiftmode;	/* ST compatible shift mode register, unused */
	u_char  char_dummy7;
	u_short tt_shiftmode;	/* TT shift mode register */


};
#define	shifter_tt	((*(volatile struct SHIFTER_TT *)SHF_TBAS))

/* values for shifter_tt->tt_shiftmode */
#define	TT_SHIFTER_STLOW		0x0000
#define	TT_SHIFTER_STMID		0x0100
#define	TT_SHIFTER_STHIGH		0x0200
#define	TT_SHIFTER_TTLOW		0x0700
#define	TT_SHIFTER_TTMID		0x0400
#define	TT_SHIFTER_TTHIGH		0x0600
#define	TT_SHIFTER_MODEMASK	0x0700
#define TT_SHIFTER_NUMMODE	0x0008
#define	TT_SHIFTER_PALETTE_MASK	0x000f
#define	TT_SHIFTER_GRAYMODE		0x1000

/* 256 TT palette registers */
#define	TT_PALETTE_BASE	(0xffff8400)
#define	tt_palette	((volatile u_short *)TT_PALETTE_BASE)

#define	TT_PALETTE_RED_MASK		0x0f00
#define	TT_PALETTE_GREEN_MASK	0x00f0
#define	TT_PALETTE_BLUE_MASK	0x000f

/*
** Falcon030 VIDEL Video Controller
** for description see File 'linux\tools\atari\hardware.txt
 */
#define f030_col ((u_long *)		0xffff9800)
#define f030_xreg ((u_short*)		0xffff8282)
#define f030_yreg ((u_short*)		0xffff82a2)
#define f030_creg ((u_short*)		0xffff82c0)
#define f030_sreg ((u_short*)		0xffff8260)
#define f030_mreg ((u_short*)		0xffff820a)
#define f030_linewidth ((u_short*)      0xffff820e)
#define f030_hscroll ((u_char*)		0xffff8265)

#define VIDEL_BAS (0xffff8260)
struct VIDEL {
	u_short st_shift;
	u_short pad1;
	u_char  xoffset_s;
	u_char  xoffset;
	u_short f_shift;
	u_char  pad2[0x1a];
	u_short hht;
	u_short hbb;
	u_short hbe;
	u_short hdb;
	u_short hde;
	u_short hss;
	u_char  pad3[0x14];
	u_short vft;
	u_short vbb;
	u_short vbe;
	u_short vdb;
	u_short vde;
	u_short vss;
	u_char  pad4[0x12];
	u_short control;
	u_short mode;
};
#define	videl	((*(volatile struct VIDEL *)VIDEL_BAS))

/*
** DMA/WD1772 Disk Controller
 */                          
 
#define FWD_BAS (0xffff8604)  
struct DMA_WD
 {
  u_short fdc_acces_seccount;
  u_short dma_mode_status;
  u_char dma_vhi;	/* Some extended ST-DMAs can handle 32 bit addresses */
  u_char dma_hi;
  u_char char_dummy2;
  u_char dma_md;
  u_char char_dummy3;
  u_char dma_lo;
  u_short fdc_speed;
 };
# define dma_wd ((*(volatile struct DMA_WD *)FWD_BAS))
/* alias */
#define	st_dma dma_wd
/* The two highest bytes of an extended DMA as a short; this is a must
 * for the Medusa.
 */
#define st_dma_ext_dmahi (*((volatile unsigned short *)0xffff8608))

/*
** YM2149 Sound Chip
** access in bytes
 */

#define YM_BAS (0xffff8800)
struct SOUND_YM
 {
  u_char rd_data_reg_sel;
  u_char char_dummy1;
  u_char wd_data;
 };
#define sound_ym ((*(volatile struct SOUND_YM *)YM_BAS))

/* TT SCSI DMA */

#define	TT_SCSI_DMA_BAS	(0xffff8700)
struct TT_DMA {
	u_char	char_dummy0;
	u_char	dma_addr_hi;
	u_char	char_dummy1;
	u_char	dma_addr_hmd;
	u_char	char_dummy2;
	u_char	dma_addr_lmd;
	u_char	char_dummy3;
	u_char	dma_addr_lo;
	u_char	char_dummy4;
	u_char	dma_cnt_hi;
	u_char	char_dummy5;
	u_char	dma_cnt_hmd;
	u_char	char_dummy6;
	u_char	dma_cnt_lmd;
	u_char	char_dummy7;
	u_char	dma_cnt_lo;
	u_long	dma_restdata;
	u_short	dma_ctrl;
};
#define	tt_scsi_dma	((*(volatile struct TT_DMA *)TT_SCSI_DMA_BAS))

/* TT SCSI Controller 5380 */

#define	TT_5380_BAS	(0xffff8781)
struct TT_5380 {
	u_char	scsi_data;
	u_char	char_dummy1;
	u_char	scsi_icr;
	u_char	char_dummy2;
	u_char	scsi_mode;
	u_char	char_dummy3;
	u_char	scsi_tcr;
	u_char	char_dummy4;
	u_char	scsi_idstat;
	u_char	char_dummy5;
	u_char	scsi_dmastat;
	u_char	char_dummy6;
	u_char	scsi_targrcv;
	u_char	char_dummy7;
	u_char	scsi_inircv;
};
#define	tt_scsi			((*(volatile struct TT_5380 *)TT_5380_BAS))
#define	tt_scsi_regp	((volatile char *)TT_5380_BAS)


/* 
** Falcon DMA Sound Subsystem
** not implemented yet
 */     

/*
** Falcon Blitter
*/

#define BLT_BAS (0xffff8a00)

struct BLITTER
 {
  u_short halftone[16];
  u_short src_x_inc;
  u_short src_y_inc;
  u_long src_address;
  u_short endmask1;  
  u_short endmask2;  
  u_short endmask3;
  u_short dst_x_inc;
  u_short dst_y_inc;
  u_long dst_address;
  u_short wd_per_line;
  u_short ln_per_bb;
  u_short hlf_op_reg;
  u_short log_op_reg;
  u_short lin_nm_reg;
  u_short skew_reg;  
 };
# define blitter ((*(volatile struct BLITTER *)BLT_BAS))


/*
** SCC Z8530
 */
 
#define SCC_BAS (0xffff8c81)
struct SCC
 {
  u_char cha_a_ctrl;
  u_char char_dummy1;
  u_char cha_a_data;
  u_char char_dummy2;