tpqic02.h

嵌入式ARM的一些源代码

/* $Id: tpqic02.h,v 0.25 1994/07/21 02:16:30 root Exp root $
 *
 * Include file for QIC-02 driver for Linux.
 *
 * Copyright (c) 1992--1995 by H. H. Bergman. All rights reserved.
 *
 * ******* USER CONFIG SECTION BELOW (Near line 70) *******
 */

#ifndef _LINUX_TPQIC02_H
#define _LINUX_TPQIC02_H

#include <linux/config.h>

#if CONFIG_QIC02_TAPE

/* need to have QIC02_TAPE_DRIVE and QIC02_TAPE_IFC expand to something */
#include <linux/mtio.h>


/* Make QIC02_TAPE_IFC expand to something.
 *
 * The only difference between WANGTEK and EVEREX is in the 
 * handling of the DMA channel 3.
 * Note that the driver maps EVEREX to WANGTEK internally for speed
 * reasons. Externally WANGTEK==1, EVEREX==2, ARCHIVE==3.
 * These must correspond to the values used in qic02config(1).
 *
 * Support for Mountain controllers was added by Erik Jacobson
 * and severely hacked by me.   -- hhb
 */
#define WANGTEK		1		   /* don't know about Wangtek QIC-36 */
#define EVEREX		(WANGTEK+1)  /* I heard *some* of these are identical */
#define EVEREX_811V	EVEREX			      /* With TEAC MT 2ST 45D */
#define EVEREX_831V	EVEREX
#define ARCHIVE		3
#define ARCHIVE_SC400	ARCHIVE	       /* rumoured to be from the pre-SMD-age */
#define ARCHIVE_SC402	ARCHIVE		       /* don't know much about SC400 */
#define ARCHIVE_SC499	ARCHIVE       /* SC402 and SC499R should be identical */

#define MOUNTAIN	5		       /* Mountain Computer Interface */


/*********** START OF USER CONFIGURABLE SECTION ************/

/* Tape configuration: Select DRIVE, IFC, PORT, IRQ and DMA below.
 * Runtime (re)configuration is not supported yet.
 *
 * Tape drive configuration:	(MT_IS* constants are defined in mtio.h)
 *
 * QIC02_TAPE_DRIVE = MT_ISWT5150
 *	- Wangtek 5150, format: up to QIC-150.
 * QIC02_TAPE_DRIVE = MT_ISQIC02_ALL_FEATURES
 *	- Enables some optional QIC02 commands that some drives may lack.
 *	  It is provided so you can check which are supported by your drive.
 *	  Refer to tpqic02.h for others.
 *
 * Supported interface cards: QIC02_TAPE_IFC =
 *	WANGTEK,
 *	ARCHIVE_SC402, ARCHIVE_SC499.	(both same programming interface)
 *
 * Make sure you have the I/O ports/DMA channels 
 * and IRQ stuff configured properly!
 * NOTE: There may be other device drivers using the same major
 *       number. This must be avoided. Check for timer.h conflicts too.
 *
 * If you have an EVEREX EV-831 card and you are using DMA channel 3,
 * you will probably have to ``#define QIC02_TAPE_DMA3_FIX'' below.
 */

/* CONFIG_QIC02_DYNCONF can be defined in autoconf.h, by `make config' */

/*** #undef CONFIG_QIC02_DYNCONF ***/

#ifndef CONFIG_QIC02_DYNCONF

#define QIC02_TAPE_DRIVE	MT_ISQIC02_ALL_FEATURES	 /* drive type */
/* #define QIC02_TAPE_DRIVE	MT_ISWT5150 */
/* #define QIC02_TAPE_DRIVE	MT_ISARCHIVE_5945L2 */
/* #define QIC02_TAPE_DRIVE	MT_ISTEAC_MT2ST */
/* #define QIC02_TAPE_DRIVE	MT_ISARCHIVE_2150L */
/* #define QIC02_TAPE_DRIVE	MT_ISARCHIVESC499 */

/* Either WANGTEK, ARCHIVE or MOUNTAIN. Not EVEREX. 
 * If you have an EVEREX, use WANGTEK and try the DMA3_FIX below.
 */
#define QIC02_TAPE_IFC		WANGTEK	/* interface card type */
/* #define QIC02_TAPE_IFC		ARCHIVE */
/* #define QIC02_TAPE_IFC		MOUNTAIN */

#define QIC02_TAPE_PORT 	0x300	/* controller port address */
#define QIC02_TAPE_IRQ		5	/* For IRQ2, use 9 here, others normal. */
#define QIC02_TAPE_DMA		1	/* either 1 or 3, because 2 is used by the floppy */

/* If DMA3 doesn't work, but DMA1 does, and you have a 
 * Wangtek/Everex card, you can try #define-ing the flag
 * below. Note that you should also change the DACK jumper
 * for Wangtek/Everex cards when changing the DMA channel.
 */
#undef QIC02_TAPE_DMA3_FIX

/************ END OF USER CONFIGURABLE SECTION *************/

/* I put the stuff above in config.in, but a few recompiles, to
 * verify different configurations, and several days later I decided
 * to change it back again.
 */



/* NOTE: TP_HAVE_DENS should distinguish between available densities (?)
 * NOTE: Drive select is not implemented -- I have only one tape streamer,
 *	 so I'm unable and unmotivated to test and implement that. ;-) ;-)
 */
#if QIC02_TAPE_DRIVE == MT_ISWT5150
#define TP_HAVE_DENS	1
#define TP_HAVE_BSF	0	/* nope */
#define TP_HAVE_FSR	0	/* nope */
#define TP_HAVE_BSR	0	/* nope */
#define TP_HAVE_EOD	0	/* most of the time */
#define TP_HAVE_SEEK	0
#define TP_HAVE_TELL	0
#define TP_HAVE_RAS1	1
#define TP_HAVE_RAS2	1

#elif QIC02_TAPE_DRIVE == MT_ISARCHIVESC499	/* Archive SC-499 QIC-36 controller */
#define TP_HAVE_DENS	1	/* can do set density (QIC-11 / QIC-24) */
#define TP_HAVE_BSF	0
#define TP_HAVE_FSR	1	/* can skip one block forwards */
#define TP_HAVE_BSR	1	/* can skip one block backwards */
#define TP_HAVE_EOD	1	/* can seek to end of recorded data */
#define TP_HAVE_SEEK	0
#define TP_HAVE_TELL	0
#define TP_HAVE_RAS1	1	/* can run selftest 1 */
#define TP_HAVE_RAS2	1	/* can run selftest 2 */
/* These last two selftests shouldn't be used yet! */

#elif (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2060L) || (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2150L)
#define TP_HAVE_DENS	1	/* can do set density (QIC-24 / QIC-120 / QIC-150) */
#define TP_HAVE_BSF	0
#define TP_HAVE_FSR	1	/* can skip one block forwards */
#define TP_HAVE_BSR	1	/* can skip one block backwards */
#define TP_HAVE_EOD	1	/* can seek to end of recorded data */
#define TP_HAVE_TELL	1	/* can read current block address */
#define TP_HAVE_SEEK	1	/* can seek to block */
#define TP_HAVE_RAS1	1	/* can run selftest 1 */
#define TP_HAVE_RAS2	1	/* can run selftest 2 */
/* These last two selftests shouldn't be used yet! */

#elif QIC02_TAPE_DRIVE == MT_ISARCHIVE_5945L2
/* can anyone verify this entry?? */
#define TP_HAVE_DENS	1	/* can do set density?? (QIC-24??) */
#define TP_HAVE_BSF	0
#define TP_HAVE_FSR	1	/* can skip one block forwards */
#define TP_HAVE_BSR	1	/* can skip one block backwards */
#define TP_HAVE_EOD	1	/* can seek to end of recorded data */
#define TP_HAVE_TELL	1	/* can read current block address */
#define TP_HAVE_SEEK	1	/* can seek to block */
#define TP_HAVE_RAS1	1	/* can run selftest 1 */
#define TP_HAVE_RAS2	1	/* can run selftest 2 */
/* These last two selftests shouldn't be used yet! */

#elif QIC02_TAPE_DRIVE == MT_ISTEAC_MT2ST
/* can anyone verify this entry?? */
#define TP_HAVE_DENS	0	/* cannot do set density?? (QIC-150?) */
#define TP_HAVE_BSF	0
#define TP_HAVE_FSR	1	/* can skip one block forwards */
#define TP_HAVE_BSR	1	/* can skip one block backwards */
#define TP_HAVE_EOD	1	/* can seek to end of recorded data */
#define TP_HAVE_SEEK	1	/* can seek to block */
#define TP_HAVE_TELL	1	/* can read current block address */
#define TP_HAVE_RAS1	1	/* can run selftest 1 */
#define TP_HAVE_RAS2	1	/* can run selftest 2 */
/* These last two selftests shouldn't be used yet! */

#elif QIC02_TAPE_DRIVE == MT_ISQIC02_ALL_FEATURES
#define TP_HAVE_DENS	1	/* can do set density */
#define TP_HAVE_BSF	1	/* can search filemark backwards */
#define TP_HAVE_FSR	1	/* can skip one block forwards */
#define TP_HAVE_BSR	1	/* can skip one block backwards */
#define TP_HAVE_EOD	1	/* can seek to end of recorded data */
#define TP_HAVE_SEEK	1	/* seek to block address */
#define TP_HAVE_TELL	1	/* tell current block address */
#define TP_HAVE_RAS1	1	/* can run selftest 1 */
#define TP_HAVE_RAS2	1	/* can run selftest 2 */
/* These last two selftests shouldn't be used yet! */


#else
#error No QIC-02 tape drive type defined!
/* If your drive is not listed above, first try the 'ALL_FEATURES',
 * to see what commands are supported, then create your own entry in
 * the list above. You may want to mail it to me, so that I can include
 * it in the next release.
 */
#endif

#endif /* !CONFIG_QIC02_DYNCONF */


/* WANGTEK interface card specifics */
#define WT_QIC02_STAT_PORT	(QIC02_TAPE_PORT)
#define WT_QIC02_CTL_PORT	(QIC02_TAPE_PORT)
#define WT_QIC02_CMD_PORT	(QIC02_TAPE_PORT+1)
#define WT_QIC02_DATA_PORT	(QIC02_TAPE_PORT+1)

/* status register bits (Active LOW!) */
#define WT_QIC02_STAT_READY	0x01
#define WT_QIC02_STAT_EXCEPTION	0x02
#define WT_QIC02_STAT_MASK	(WT_QIC02_STAT_READY|WT_QIC02_STAT_EXCEPTION)

#define WT_QIC02_STAT_RESETMASK	0x07
#define WT_QIC02_STAT_RESETVAL	(WT_QIC02_STAT_RESETMASK & ~WT_QIC02_STAT_EXCEPTION)

/* controller register (QIC02_CTL_PORT) bits */
#define WT_QIC02_CTL_RESET	0x02
#define WT_QIC02_CTL_REQUEST	0x04
#define WT_CTL_ONLINE		0x01
#define WT_CTL_CMDOFF		0xC0 

#define WT_CTL_DMA3		0x10			  /* enable dma chan3 */
#define WT_CTL_DMA1		0x08	         /* enable dma chan1 or chan2 */




/* ARCHIVE interface card specifics */
#define AR_QIC02_STAT_PORT	(QIC02_TAPE_PORT+1)
#define AR_QIC02_CTL_PORT	(QIC02_TAPE_PORT+1)
#define AR_QIC02_CMD_PORT	(QIC02_TAPE_PORT)
#define AR_QIC02_DATA_PORT	(QIC02_TAPE_PORT)

#define AR_START_DMA_PORT	(QIC02_TAPE_PORT+2)
#define AR_RESET_DMA_PORT	(QIC02_TAPE_PORT+3)

/* STAT port bits */
#define AR_STAT_IRQF		0x80	/* active high, interrupt request flag */
#define AR_QIC02_STAT_READY	0x40	/* active low */
#define AR_QIC02_STAT_EXCEPTION	0x20	/* active low */
#define AR_QIC02_STAT_MASK	(AR_QIC02_STAT_READY|AR_QIC02_STAT_EXCEPTION)
#define AR_STAT_DMADONE		0x10	/* active high, DMA done */
#define AR_STAT_DIRC		0x08	/* active high, direction */

#define AR_QIC02_STAT_RESETMASK	0x70	/* check RDY,EXC,DMADONE */
#define AR_QIC02_STAT_RESETVAL	((AR_QIC02_STAT_RESETMASK & ~AR_STAT_IRQF & ~AR_QIC02_STAT_EXCEPTION) | AR_STAT_DMADONE)

/* CTL port bits */
#define AR_QIC02_CTL_RESET	0x80	/* drive reset */
#define AR_QIC02_CTL_REQUEST	0x40	/* notify of new command */
#define AR_CTL_IEN		0x20	/* interrupt enable */
#define AR_CTL_DNIEN		0x10	/* done-interrupt enable */
  /* Note: All of these bits are cleared automatically when writing to
   * AR_RESET_DMA_PORT. So AR_CTL_IEN and AR_CTL_DNIEN must be
   * reprogrammed before the write to AR_START_DMA_PORT.
   */


/* MOUNTAIN interface specifics */
#define MTN_QIC02_STAT_PORT	(QIC02_TAPE_PORT+1)
#define MTN_QIC02_CTL_PORT	(QIC02_TAPE_PORT+1)
#define MTN_QIC02_CMD_PORT	(QIC02_TAPE_PORT)
#define MTN_QIC02_DATA_PORT	(QIC02_TAPE_PORT)

#define MTN_W_SELECT_DMA_PORT	(QIC02_TAPE_PORT+2)
#define MTN_R_DESELECT_DMA_PORT	(QIC02_TAPE_PORT+2)
#define MTN_W_DMA_WRITE_PORT	(QIC02_TAPE_PORT+3)

/* STAT port bits */
#define MTN_QIC02_STAT_READY	 0x02	/* active low */
#define MTN_QIC02_STAT_EXCEPTION 0x04	/* active low */
#define MTN_QIC02_STAT_MASK	 (MTN_QIC02_STAT_READY|MTN_QIC02_STAT_EXCEPTION)
#define MTN_STAT_DMADONE	 0x01	/* active high, DMA done */

#define MTN_QIC02_STAT_RESETMASK 0x07	/* check RDY,EXC,DMADONE */
#define MTN_QIC02_STAT_RESETVAL	 ((MTN_QIC02_STAT_RESETMASK & ~MTN_QIC02_STAT_EXCEPTION) | MTN_STAT_DMADONE)

  /* CTL port bits */
#define MTN_QIC02_CTL_RESET_NOT	 0x80	/* drive reset, active low */
#define MTN_QIC02_CTL_RESET	 0x80	/* Fodder #definition to keep gcc happy */

#define MTN_QIC02_CTL_ONLINE	 0x40	/* Put drive on line  */
#define MTN_QIC02_CTL_REQUEST	 0x20	/* notify of new command */
#define MTN_QIC02_CTL_IRQ_DRIVER 0x10	/* Enable IRQ tristate driver */
#define MTN_QIC02_CTL_DMA_DRIVER 0x08	/* Enable DMA tristate driver */
#define MTN_CTL_EXC_IEN		 0x04	/* Exception interrupt enable */
#define MTN_CTL_RDY_IEN		 0x02	/* Ready interrupt enable */
#define MTN_CTL_DNIEN		 0x01	/* done-interrupt enable */

#define MTN_CTL_ONLINE		(MTN_QIC02_CTL_RESET_NOT | MTN_QIC02_CTL_IRQ_DRIVER | MTN_QIC02_CTL_DMA_DRIVER)


#ifndef CONFIG_QIC02_DYNCONF

# define QIC02_TAPE_DEBUG	(qic02_tape_debug)

# if QIC02_TAPE_IFC == WANGTEK	
#  define QIC02_STAT_PORT	WT_QIC02_STAT_PORT
#  define QIC02_CTL_PORT	WT_QIC02_CTL_PORT
#  define QIC02_CMD_PORT	WT_QIC02_CMD_PORT
#  define QIC02_DATA_PORT	WT_QIC02_DATA_PORT

#  define QIC02_STAT_READY	WT_QIC02_STAT_READY
#  define QIC02_STAT_EXCEPTION	WT_QIC02_STAT_EXCEPTION
#  define QIC02_STAT_MASK	WT_QIC02_STAT_MASK
#  define QIC02_STAT_RESETMASK	WT_QIC02_STAT_RESETMASK
#  define QIC02_STAT_RESETVAL	WT_QIC02_STAT_RESETVAL

#  define QIC02_CTL_RESET	WT_QIC02_CTL_RESET
#  define QIC02_CTL_REQUEST	WT_QIC02_CTL_REQUEST

#  if QIC02_TAPE_DMA == 3
#   ifdef QIC02_TAPE_DMA3_FIX
#    define WT_CTL_DMA		WT_CTL_DMA1
#   else
#    define WT_CTL_DMA		WT_CTL_DMA3
#   endif
#  elif QIC02_TAPE_DMA == 1
#    define WT_CTL_DMA		WT_CTL_DMA1
#  else
#   error Unsupported or incorrect DMA configuration.
#  endif

# elif QIC02_TAPE_IFC == ARCHIVE
#  define QIC02_STAT_PORT	AR_QIC02_STAT_PORT
#  define QIC02_CTL_PORT	AR_QIC02_CTL_PORT
#  define QIC02_CMD_PORT	AR_QIC02_CMD_PORT
#  define QIC02_DATA_PORT	AR_QIC02_DATA_PORT

#  define QIC02_STAT_READY	AR_QIC02_STAT_READY
#  define QIC02_STAT_EXCEPTION	AR_QIC02_STAT_EXCEPTION
#  define QIC02_STAT_MASK	AR_QIC02_STAT_MASK
#  define QIC02_STAT_RESETMASK	AR_QIC02_STAT_RESETMASK
#  define QIC02_STAT_RESETVAL	AR_QIC02_STAT_RESETVAL