flash.h

嵌入式ARM的一些源代码

#define C302F_BNK_ADDR_MAN(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_MAN)
#define C302F_BNK_ADDR_DEV(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_DEV)
#define C302F_BNK_ADDR_CFGM(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFGM)
#define C302F_BNK_ADDR_CFG0(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG0)
#define C302F_BNK_ADDR_CFG1(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG1)
#define C302F_BNK_ADDR_CFG2(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG2)
#define C302F_BNK_ADDR_CFG3(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG3)
#define C302F_BNK_ADDR_CFG4(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG4)
#define C302F_BNK_ADDR_CFG5(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG5)
#define C302F_BNK_ADDR_CFG6(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG6)
#define C302F_BNK_ADDR_CFG7(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG7)
#define C302F_BNK_ADDR_CFG8(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG8)
#define C302F_BNK_ADDR_CFG9(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG9)
#define C302F_BNK_ADDR_CFG10(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG10)
#define C302F_BNK_ADDR_CFG11(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG11)
#define C302F_BNK_ADDR_CFG12(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG12)
#define C302F_BNK_ADDR_CFG13(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG13)
#define C302F_BNK_ADDR_CFG14(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG14)
#define C302F_BNK_ADDR_CFG15(a)	C302F_BNK_ADDR_I8S5REG((a), I8S5_ADDR_CFG15)

/*
 * replicate a chip cmd/stat/rd value into each byte position within a word
 * so that multiple chips are accessed in a single word i/o operation
 *
 * this must be as wide as the c302f_word_t type
 */
#define C302F_FILL_WORD(o)	(((unsigned long)(o) << 24) | \
				    ((unsigned long)(o) << 16) | \
				    ((unsigned long)(o) << 8) | \
				    (unsigned long)(o))

/* make a bank representation for each chip cmd/stat/rd value */

/* Commands */
#define C302F_BNK_CMD_RST	C302F_FILL_WORD(I8S5_CMD_RST)
#define C302F_BNK_CMD_RD_ID	C302F_FILL_WORD(I8S5_CMD_RD_ID)
#define C302F_BNK_CMD_RD_STAT	C302F_FILL_WORD(I8S5_CMD_RD_STAT)
#define C302F_BNK_CMD_CLR_STAT	C302F_FILL_WORD(I8S5_CMD_CLR_STAT)
#define C302F_BNK_CMD_ERASE1	C302F_FILL_WORD(I8S5_CMD_ERASE1)
#define C302F_BNK_CMD_ERASE2	C302F_FILL_WORD(I8S5_CMD_ERASE2)
#define C302F_BNK_CMD_PROG	C302F_FILL_WORD(I8S5_CMD_PROG)
#define C302F_BNK_CMD_LOCK	C302F_FILL_WORD(I8S5_CMD_LOCK)
#define C302F_BNK_CMD_SET_LOCK_BLK C302F_FILL_WORD(I8S5_CMD_SET_LOCK_BLK)
#define C302F_BNK_CMD_SET_LOCK_MSTR C302F_FILL_WORD(I8S5_CMD_SET_LOCK_MSTR)
#define C302F_BNK_CMD_CLR_LOCK_BLK C302F_FILL_WORD(I8S5_CMD_CLR_LOCK_BLK)

/* status register bits */
#define C302F_BNK_STAT_DPS	C302F_FILL_WORD(I8S5_STAT_DPS)
#define C302F_BNK_STAT_PSS	C302F_FILL_WORD(I8S5_STAT_PSS)
#define C302F_BNK_STAT_VPPS	C302F_FILL_WORD(I8S5_STAT_VPPS)
#define C302F_BNK_STAT_PSLBS	C302F_FILL_WORD(I8S5_STAT_PSLBS)
#define C302F_BNK_STAT_ECLBS	C302F_FILL_WORD(I8S5_STAT_ECLBS)
#define C302F_BNK_STAT_ESS	C302F_FILL_WORD(I8S5_STAT_ESS)
#define C302F_BNK_STAT_RDY	C302F_FILL_WORD(I8S5_STAT_RDY)

#define C302F_BNK_STAT_ERR	C302F_FILL_WORD(I8S5_STAT_ERR)

/* ID and Lock Configuration */
#define C302F_BNK_RD_ID_LOCK	C302F_FILL_WORD(I8S5_RD_ID_LOCK)
#define C302F_BNK_RD_ID_MAN	C302F_FILL_WORD(I8S5_RD_ID_MAN)
#define C302F_BNK_RD_ID_DEV	C302F_FILL_WORD(I8S5_RD_ID_DEV)

/*************** DEFINES for Cogent Motherboard Flash ************************/

typedef unsigned short cmbf_word_t;	/* 16 bit unsigned integer */
typedef volatile cmbf_word_t *cmbf_addr_t;
typedef unsigned long cmbf_size_t;	/* want this big - at least 32 bit */

/* layout of banks on cogent motherboard - only 1 bank, 16 bit wide */
#define CMBF_BNK_WIDTH		1	/* each bank is one chip wide */
#define CMBF_BNK_WSHIFT	0	/* log base 2 of CMBF_BNK_WIDTH */
#define CMBF_BNK_NBLOCKS	I8B5_NBLOCKS
#define CMBF_BNK_BLKSZ		(I8B5_BLKSZ * CMBF_BNK_WIDTH)
#define CMBF_BNK_SIZE		(I8B5_SIZE * CMBF_BNK_WIDTH)

#define CMBF_MAX_BANKS		1	/* only 1 x 1Mbyte bank on cogent m/b */

/* align addresses and sizes to bank boundaries */
#define CMBF_BNK_ADDR_ALIGN(a)	((c302f_addr_t)((c302f_size_t)(a) \
				    & ~(CMBF_BNK_WIDTH - 1)))
#define CMBF_BNK_SIZE_ALIGN(s)	((c302f_size_t)CMBF_BNK_ADDR_ALIGN( \
				    (c302f_size_t)(s) + (CMBF_BNK_WIDTH - 1)))

/* align addresses and sizes to block boundaries */
#define CMBF_BLK_ADDR_ALIGN(a)	((c302f_addr_t)((c302f_size_t)(a) \
				    & ~(CMBF_BNK_BLKSZ - 1)))
#define CMBF_BLK_SIZE_ALIGN(s)	((c302f_size_t)CMBF_BLK_ADDR_ALIGN( \
				    (c302f_size_t)(s) + (CMBF_BNK_BLKSZ - 1)))

/* add a byte offset to a flash address */
#define CMBF_ADDR_ADD_BYTEOFF(a,o) \
				(c302f_addr_t)((c302f_size_t)(a) + (o))

/* get base address of bank b, given flash base address a */
#define CMBF_BNK_ADDR_BASE(a,b) \
				CMBF_ADDR_ADD_BYTEOFF((a), \
				    (c302f_size_t)(b) * CMBF_BNK_SIZE)

/* adjust an address a (within a bank) to next word, block or bank */
#define CMBF_BNK_ADDR_NEXT_WORD(a) \
				CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_WIDTH)
#define CMBF_BNK_ADDR_NEXT_BLK(a) \
				CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_BLKSZ)
#define CMBF_BNK_ADDR_NEXT_BNK(a) \
				CMBF_ADDR_ADD_BYTEOFF((a), CMBF_BNK_SIZE)

/* get bank address of chip register r given a bank base address a */
#define CMBF_BNK_ADDR_I8B5REG(a,r) \
				CMBF_ADDR_ADD_BYTEOFF((a), \
				    (r) << CMBF_BNK_WSHIFT)

/* make a bank representation for each chip address */

#define CMBF_BNK_ADDR_MAN(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_MAN)
#define CMBF_BNK_ADDR_DEV(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_DEV)
#define CMBF_BNK_ADDR_CFGM(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFGM)
#define CMBF_BNK_ADDR_CFG0(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG0)
#define CMBF_BNK_ADDR_CFG1(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG1)
#define CMBF_BNK_ADDR_CFG2(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG2)
#define CMBF_BNK_ADDR_CFG3(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG3)
#define CMBF_BNK_ADDR_CFG4(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG4)
#define CMBF_BNK_ADDR_CFG5(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG5)
#define CMBF_BNK_ADDR_CFG6(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG6)
#define CMBF_BNK_ADDR_CFG7(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG7)
#define CMBF_BNK_ADDR_CFG8(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG8)
#define CMBF_BNK_ADDR_CFG9(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG9)
#define CMBF_BNK_ADDR_CFG10(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG10)
#define CMBF_BNK_ADDR_CFG11(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG11)
#define CMBF_BNK_ADDR_CFG12(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG12)
#define CMBF_BNK_ADDR_CFG13(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG13)
#define CMBF_BNK_ADDR_CFG14(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG14)
#define CMBF_BNK_ADDR_CFG15(a)	CMBF_BNK_ADDR_I8B5REG((a), I8B5_ADDR_CFG15)

/*
 * replicate a chip cmd/stat/rd value into each byte position within a word
 * so that multiple chips are accessed in a single word i/o operation
 *
 * this must be as wide as the c302f_word_t type
 */
#define CMBF_FILL_WORD(o)	(((unsigned long)(o) << 24) | \
				    ((unsigned long)(o) << 16) | \
				    ((unsigned long)(o) << 8) | \
				    (unsigned long)(o))

/* make a bank representation for each chip cmd/stat/rd value */

/* Commands */
#define CMBF_BNK_CMD_RST	CMBF_FILL_WORD(I8B5_CMD_RST)
#define CMBF_BNK_CMD_RD_ID	CMBF_FILL_WORD(I8B5_CMD_RD_ID)
#define CMBF_BNK_CMD_RD_STAT	CMBF_FILL_WORD(I8B5_CMD_RD_STAT)
#define CMBF_BNK_CMD_CLR_STAT	CMBF_FILL_WORD(I8B5_CMD_CLR_STAT)
#define CMBF_BNK_CMD_ERASE1	CMBF_FILL_WORD(I8B5_CMD_ERASE1)
#define CMBF_BNK_CMD_ERASE2	CMBF_FILL_WORD(I8B5_CMD_ERASE2)
#define CMBF_BNK_CMD_PROG	CMBF_FILL_WORD(I8B5_CMD_PROG)
#define CMBF_BNK_CMD_LOCK	CMBF_FILL_WORD(I8B5_CMD_LOCK)
#define CMBF_BNK_CMD_SET_LOCK_BLK CMBF_FILL_WORD(I8B5_CMD_SET_LOCK_BLK)
#define CMBF_BNK_CMD_SET_LOCK_MSTR CMBF_FILL_WORD(I8B5_CMD_SET_LOCK_MSTR)
#define CMBF_BNK_CMD_CLR_LOCK_BLK CMBF_FILL_WORD(I8B5_CMD_CLR_LOCK_BLK)

/* status register bits */
#define CMBF_BNK_STAT_DPS	CMBF_FILL_WORD(I8B5_STAT_DPS)
#define CMBF_BNK_STAT_PSS	CMBF_FILL_WORD(I8B5_STAT_PSS)
#define CMBF_BNK_STAT_VPPS	CMBF_FILL_WORD(I8B5_STAT_VPPS)
#define CMBF_BNK_STAT_PSLBS	CMBF_FILL_WORD(I8B5_STAT_PSLBS)
#define CMBF_BNK_STAT_ECLBS	CMBF_FILL_WORD(I8B5_STAT_ECLBS)
#define CMBF_BNK_STAT_ESS	CMBF_FILL_WORD(I8B5_STAT_ESS)
#define CMBF_BNK_STAT_RDY	CMBF_FILL_WORD(I8B5_STAT_RDY)

#define CMBF_BNK_STAT_ERR	CMBF_FILL_WORD(I8B5_STAT_ERR)

/* ID and Lock Configuration */
#define CMBF_BNK_RD_ID_LOCK	CMBF_FILL_WORD(I8B5_RD_ID_LOCK)
#define CMBF_BNK_RD_ID_MAN	CMBF_FILL_WORD(I8B5_RD_ID_MAN)
#define CMBF_BNK_RD_ID_DEV	CMBF_FILL_WORD(I8B5_RD_ID_DEV)