📄 main.lst
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1 .file "main.c"
2 .arch atmega8
3 __SREG__ = 0x3f
4 __SP_H__ = 0x3e
5 __SP_L__ = 0x3d
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
8 .global __do_copy_data
9 .global __do_clear_bss
11 .text
12 .Ltext0:
58 .data
61 year:
62 0000 06 .byte 6
65 month:
66 0001 02 .byte 2
69 day:
70 0002 17 .byte 23
73 week:
74 0003 05 .byte 5
77 hour:
78 0004 10 .byte 16
81 minute:
82 0005 54 .byte 84
83 .lcomm second,1
84 .text
87 .global delay_1us
89 delay_1us:
91 .Ltext1:
1:./ds1302.h **** #include <avr/io.h>
2:./ds1302.h **** #define uchar unsigned char
3:./ds1302.h **** #define uint unsigned int
4:./ds1302.h **** //static uchar year=2,month=2,day=2,week=2;
5:./ds1302.h **** //hour=0x19表示将时间设为19小时,minute=0x45设为45分钟
6:./ds1302.h **** static uchar year=0x06,month=0x02,day=0x17,week=0x05;
7:./ds1302.h **** static uchar hour=0x10,minute=0x54,second=0x00;
8:./ds1302.h **** uchar data_Int1,data_Int2;
9:./ds1302.h ****
10:./ds1302.h **** #define ds1302_rst PC3
11:./ds1302.h **** #define ds1302_io PC5
12:./ds1302.h **** #define ds1302_sclk PC4
13:./ds1302.h ****
14:./ds1302.h **** #define set_ds1302_rst_ddr() DDRC|=1<<ds1302_rst
15:./ds1302.h **** #define set_ds1302_rst() PORTC|=1<<ds1302_rst
16:./ds1302.h **** #define clr_ds1302_rst() PORTC&=~(1<<ds1302_rst)
17:./ds1302.h **** #define set_ds1302_io_ddr() DDRC|=1<<ds1302_io
18:./ds1302.h **** #define set_ds1302_io() PORTC|=1<<ds1302_io
19:./ds1302.h **** #define clr_ds1302_io() PORTC&=~(1<<ds1302_io)
20:./ds1302.h **** #define clr_ds1302_io_ddr() DDRC&=~(1<<ds1302_io)
21:./ds1302.h **** //#define in_ds1302_io() PINC&=(1<<ds1302_io)
22:./ds1302.h **** #define set_ds1302_sclk_ddr() DDRC|=1<<ds1302_sclk
23:./ds1302.h **** #define set_ds1302_sclk() PORTC|=1<<ds1302_sclk
24:./ds1302.h **** #define clr_ds1302_sclk() PORTC&=~(1<<ds1302_sclk)
25:./ds1302.h ****
26:./ds1302.h **** //此定义为写地址
27:./ds1302.h **** #define ds1302_sec_reg 0x80
28:./ds1302.h **** #define ds1302_min_reg 0x82
29:./ds1302.h **** #define ds1302_hr_reg 0x84
30:./ds1302.h **** #define ds1302_date_reg 0x86
31:./ds1302.h **** #define ds1302_month_reg 0x88
32:./ds1302.h **** #define ds1302_day_reg 0x8a
33:./ds1302.h **** #define ds1302_year_reg 0x8c
34:./ds1302.h **** #define ds1302_control_reg 0x8e
35:./ds1302.h **** #define ds1302_charger_reg 0x90
36:./ds1302.h **** //#define ds1302_clkburst_reg 0xbe
37:./ds1302.h ****
38:./ds1302.h ****
39:./ds1302.h **** //----------------------------delay----------
40:./ds1302.h **** void delay_1us(void) //1us延时函数
41:./ds1302.h **** {
93 .LM1:
94 /* prologue: frame size=0 */
95 0000 CF93 push r28
96 0002 DF93 push r29
97 0004 CDB7 in r28,__SP_L__
98 0006 DEB7 in r29,__SP_H__
99 /* prologue end (size=4) */
42:./ds1302.h **** * asm("nop");
43:./ds1302.h **** asm("nop");
44:./ds1302.h **** asm("nop");
45:./ds1302.h **** asm("nop");
46:./ds1302.h **** asm("nop");
47:./ds1302.h **** asm("nop");
48:./ds1302.h **** asm("nop");*/
49:./ds1302.h **** asm("nop");
101 .LM2:
102 /* #APP */
103 0008 0000 nop
104 /* #NOAPP */
105 /* epilogue: frame size=0 */
106 000a DF91 pop r29
107 000c CF91 pop r28
108 000e 0895 ret
109 /* epilogue end (size=3) */
110 /* function delay_1us size 9 (2) */
112 .Lscope0:
115 .global delay_nus
117 delay_nus:
50:./ds1302.h **** }
51:./ds1302.h **** //===============================
52:./ds1302.h **** void delay_nus(unsigned int n) //N us延时函数
53:./ds1302.h **** {
119 .LM3:
120 /* prologue: frame size=2 */
121 0010 CF93 push r28
122 0012 DF93 push r29
123 0014 CDB7 in r28,__SP_L__
124 0016 DEB7 in r29,__SP_H__
125 0018 2297 sbiw r28,2
126 001a 0FB6 in __tmp_reg__,__SREG__
127 001c F894 cli
128 001e DEBF out __SP_H__,r29
129 0020 0FBE out __SREG__,__tmp_reg__
130 0022 CDBF out __SP_L__,r28
131 /* prologue end (size=10) */
132 0024 8983 std Y+1,r24
133 0026 9A83 std Y+2,r25
134 .L3:
54:./ds1302.h **** for (;n>0;n--)
136 .LM4:
137 0028 8981 ldd r24,Y+1
138 002a 9A81 ldd r25,Y+2
139 002c 0097 sbiw r24,0
140 002e 39F0 breq .L2
55:./ds1302.h **** //delay_1us();
56:./ds1302.h **** asm("nop");
142 .LM5:
143 /* #APP */
144 0030 0000 nop
146 .LM6:
147 /* #NOAPP */
148 0032 8981 ldd r24,Y+1
149 0034 9A81 ldd r25,Y+2
150 0036 0197 sbiw r24,1
151 0038 8983 std Y+1,r24
152 003a 9A83 std Y+2,r25
153 003c F5CF rjmp .L3
154 .L2:
155 /* epilogue: frame size=2 */
156 003e 2296 adiw r28,2
157 0040 0FB6 in __tmp_reg__,__SREG__
158 0042 F894 cli
159 0044 DEBF out __SP_H__,r29
160 0046 0FBE out __SREG__,__tmp_reg__
161 0048 CDBF out __SP_L__,r28
162 004a DF91 pop r29
163 004c CF91 pop r28
164 004e 0895 ret
165 /* epilogue end (size=9) */
166 /* function delay_nus size 33 (14) */
168 .Lscope1:
170 .global delay_1ms
172 delay_1ms:
57:./ds1302.h **** }
58:./ds1302.h **** //===============================
59:./ds1302.h **** void delay_1ms(void) //1ms延时函数
60:./ds1302.h **** {
174 .LM7:
175 /* prologue: frame size=2 */
176 0050 CF93 push r28
177 0052 DF93 push r29
178 0054 CDB7 in r28,__SP_L__
179 0056 DEB7 in r29,__SP_H__
180 0058 2297 sbiw r28,2
181 005a 0FB6 in __tmp_reg__,__SREG__
182 005c F894 cli
183 005e DEBF out __SP_H__,r29
184 0060 0FBE out __SREG__,__tmp_reg__
185 0062 CDBF out __SP_L__,r28
186 /* prologue end (size=10) */
61:./ds1302.h **** unsigned int i;
62:./ds1302.h **** for(i=0;i<1000;i++)
188 .LM8:
189 0064 1982 std Y+1,__zero_reg__
190 0066 1A82 std Y+2,__zero_reg__
191 .L7:
193 .LM9:
194 0068 8981 ldd r24,Y+1
195 006a 9A81 ldd r25,Y+2
196 006c 23E0 ldi r18,hi8(1000)
197 006e 883E cpi r24,lo8(1000)
198 0070 9207 cpc r25,r18
199 0072 38F4 brsh .L6
63:./ds1302.h **** delay_1us();
201 .LM10:
202 0074 C5DF rcall delay_1us
204 .LM11:
205 0076 8981 ldd r24,Y+1
206 0078 9A81 ldd r25,Y+2
207 007a 0196 adiw r24,1
208 007c 8983 std Y+1,r24
209 007e 9A83 std Y+2,r25
210 0080 F3CF rjmp .L7
211 .L6:
212 /* epilogue: frame size=2 */
213 0082 2296 adiw r28,2
214 0084 0FB6 in __tmp_reg__,__SREG__
215 0086 F894 cli
216 0088 DEBF out __SP_H__,r29
217 008a 0FBE out __SREG__,__tmp_reg__
218 008c CDBF out __SP_L__,r28
219 008e DF91 pop r29
220 0090 CF91 pop r28
221 0092 0895 ret
222 /* epilogue end (size=9) */
223 /* function delay_1ms size 34 (15) */
228 .Lscope2:
231 .global delay_nms
233 delay_nms:
64:./ds1302.h **** }
65:./ds1302.h ****
66:./ds1302.h **** //===============================
67:./ds1302.h **** void delay_nms(unsigned int n) //N ms延时函数
68:./ds1302.h **** {
235 .LM12:
236 /* prologue: frame size=2 */
237 0094 CF93 push r28
238 0096 DF93 push r29
239 0098 CDB7 in r28,__SP_L__
240 009a DEB7 in r29,__SP_H__
241 009c 2297 sbiw r28,2
242 009e 0FB6 in __tmp_reg__,__SREG__
243 00a0 F894 cli
244 00a2 DEBF out __SP_H__,r29
245 00a4 0FBE out __SREG__,__tmp_reg__
246 00a6 CDBF out __SP_L__,r28
247 /* prologue end (size=10) */
248 00a8 8983 std Y+1,r24
249 00aa 9A83 std Y+2,r25
250 .L11:
69:./ds1302.h **** for(;n>0;n--)
252 .LM13:
253 00ac 8981 ldd r24,Y+1
254 00ae 9A81 ldd r25,Y+2
255 00b0 0097 sbiw r24,0
256 00b2 39F0 breq .L10
70:./ds1302.h **** delay_1ms();
258 .LM14:
259 00b4 CDDF rcall delay_1ms
261 .LM15:
262 00b6 8981 ldd r24,Y+1
263 00b8 9A81 ldd r25,Y+2
264 00ba 0197 sbiw r24,1
265 00bc 8983 std Y+1,r24
266 00be 9A83 std Y+2,r25
267 00c0 F5CF rjmp .L11
268 .L10:
269 /* epilogue: frame size=2 */
270 00c2 2296 adiw r28,2
271 00c4 0FB6 in __tmp_reg__,__SREG__
272 00c6 F894 cli
273 00c8 DEBF out __SP_H__,r29
274 00ca 0FBE out __SREG__,__tmp_reg__
275 00cc CDBF out __SP_L__,r28
276 00ce DF91 pop r29
277 00d0 CF91 pop r28
278 00d2 0895 ret
279 /* epilogue end (size=9) */
280 /* function delay_nms size 32 (13) */
282 .Lscope3:
284 .global IO_INIT
286 IO_INIT:
71:./ds1302.h **** }
72:./ds1302.h **** void IO_INIT(void)
73:./ds1302.h **** {
288 .LM16:
289 /* prologue: frame size=0 */
290 00d4 CF93 push r28
291 00d6 DF93 push r29
292 00d8 CDB7 in r28,__SP_L__
293 00da DEB7 in r29,__SP_H__
294 /* prologue end (size=4) */
74:./ds1302.h **** DDRC=0Xff; //key_bord
296 .LM17:
297 00dc 8FEF ldi r24,lo8(-1)
298 00de 8093 3400 sts 52,r24
299 /* epilogue: frame size=0 */
300 00e2 DF91 pop r29
301 00e4 CF91 pop r28
302 00e6 0895 ret
303 /* epilogue end (size=3) */
304 /* function IO_INIT size 10 (3) */
306 .Lscope4:
310 .global ds1302_write
312 ds1302_write:
75:./ds1302.h **** }
76:./ds1302.h ****
77:./ds1302.h **** void ds1302_write(uchar reg,uchar data)
78:./ds1302.h **** {
314 .LM18:
315 /* prologue: frame size=3 */
316 00e8 CF93 push r28
317 00ea DF93 push r29
318 00ec CDB7 in r28,__SP_L__
319 00ee DEB7 in r29,__SP_H__
320 00f0 2397 sbiw r28,3
321 00f2 0FB6 in __tmp_reg__,__SREG__
322 00f4 F894 cli
323 00f6 DEBF out __SP_H__,r29
324 00f8 0FBE out __SREG__,__tmp_reg__
325 00fa CDBF out __SP_L__,r28
326 /* prologue end (size=10) */
327 00fc 8983 std Y+1,r24
328 00fe 6A83 std Y+2,r22
79:./ds1302.h **** char i=0;
330 .LM19:
331 0100 1B82 std Y+3,__zero_reg__
80:./ds1302.h **** set_ds1302_rst_ddr();
333 .LM20:
334 0102 8091 3400 lds r24,52
335 0106 8860 ori r24,lo8(8)
336 0108 8093 3400 sts 52,r24
81:./ds1302.h **** set_ds1302_sclk_ddr();
338 .LM21:
339 010c 8091 3400 lds r24,52
340 0110 8061 ori r24,lo8(16)
341 0112 8093 3400 sts 52,r24
82:./ds1302.h **** set_ds1302_io_ddr(); /*设为输出*/
343 .LM22:
344 0116 8091 3400 lds r24,52
345 011a 8062 ori r24,lo8(32)
346 011c 8093 3400 sts 52,r24
83:./ds1302.h ****
84:./ds1302.h **** clr_ds1302_rst(); /*置0*/
348 .LM23:
349 0120 8091 3500 lds r24,53
350 0124 877F andi r24,lo8(-9)
351 0126 8093 3500 sts 53,r24
85:./ds1302.h **** clr_ds1302_sclk(); /*置0,在RST置1时,SCLK必须为0*/
353 .LM24:
354 012a 8091 3500 lds r24,53
355 012e 8F7E andi r24,lo8(-17)
356 0130 8093 3500 sts 53,r24
86:./ds1302.h **** set_ds1302_rst(); /*置1,启动数据传送*/
358 .LM25:
359 0134 8091 3500 lds r24,53
360 0138 8860 ori r24,lo8(8)
361 013a 8093 3500 sts 53,r24
87:./ds1302.h **** for(i=8;i>0;i--) /*写地址*/
363 .LM26:
364 013e 88E0 ldi r24,lo8(8)
365 0140 8B83 std Y+3,r24
366 .L16:
368 .LM27:
369 0142 8B81 ldd r24,Y+3
370 0144 8823 tst r24
371 0146 11F1 breq .L17
88:./ds1302.h **** {
89:./ds1302.h ****
90:./ds1302.h **** if((reg&0x01)==0x01)
373 .LM28:
374 0148 8981 ldd r24,Y+1
375 014a 9927 clr r25
376 014c 8170 andi r24,lo8(1)
377 014e 9070 andi r25,hi8(1)
378 0150 0097 sbiw r24,0
379 0152 31F0 breq .L19
91:./ds1302.h **** set_ds1302_io();
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