pci.h

开放源码的嵌入式开发环境

#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC             0x2120
#define PCI_DEVICE_ID_OPTIBASE_VQUEST              0x2130

#define PCI_VENDOR_ID_SATSAGEM                     0x1267
#define PCI_DEVICE_ID_SATSAGEM_PCR2101             0x5352
#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO         0x5a4b

#define PCI_VENDOR_ID_HUGHES                       0x1273
#define PCI_DEVICE_ID_HUGHES_DIRECPC               0x0002

#define PCI_VENDOR_ID_ENSONIQ                      0x1274
#define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI             0x5000

#define PCI_VENDOR_ID_ALTEON                       0x12ae
#define PCI_DEVICE_ID_ALTEON_ACENIC                0x0001

#define PCI_VENDOR_ID_PICTUREL                     0x12c5
#define PCI_DEVICE_ID_PICTUREL_PCIVST              0x0081

#define PCI_VENDOR_ID_NVIDIA_SGS                   0x12d2
#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128           0x0018

#define PCI_VENDOR_ID_CBOARDS                      0x1307
#define PCI_DEVICE_ID_CBOARDS_DAS1602_16           0x0001

#define PCI_VENDOR_ID_SYMPHONY                     0x1c1c
#define PCI_DEVICE_ID_SYMPHONY_101                 0x0001

#define PCI_VENDOR_ID_TEKRAM                       0x1de1
#define PCI_DEVICE_ID_TEKRAM_DC290                 0xdc29

#define PCI_VENDOR_ID_3DLABS                       0x3d3d
#define PCI_DEVICE_ID_3DLABS_300SX                 0x0001
#define PCI_DEVICE_ID_3DLABS_500TX                 0x0002
#define PCI_DEVICE_ID_3DLABS_DELTA                 0x0003
#define PCI_DEVICE_ID_3DLABS_PERMEDIA              0x0004
#define PCI_DEVICE_ID_3DLABS_MX                    0x0006

#define PCI_VENDOR_ID_AVANCE                       0x4005
#define PCI_DEVICE_ID_AVANCE_ALG2064               0x2064
#define PCI_DEVICE_ID_AVANCE_2302                  0x2302

#define PCI_VENDOR_ID_NETVIN                       0x4a14
#define PCI_DEVICE_ID_NETVIN_NV5000SC              0x5000

#define PCI_VENDOR_ID_S3                           0x5333
#define PCI_DEVICE_ID_S3_PLATO_PXS                 0x0551
#define PCI_DEVICE_ID_S3_ViRGE                     0x5631
#define PCI_DEVICE_ID_S3_TRIO                      0x8811
#define PCI_DEVICE_ID_S3_AURORA64VP                0x8812
#define PCI_DEVICE_ID_S3_TRIO64UVP                 0x8814
#define PCI_DEVICE_ID_S3_ViRGE_VX                  0x883d
#define PCI_DEVICE_ID_S3_868                       0x8880
#define PCI_DEVICE_ID_S3_928                       0x88b0
#define PCI_DEVICE_ID_S3_864_1                     0x88c0
#define PCI_DEVICE_ID_S3_864_2                     0x88c1
#define PCI_DEVICE_ID_S3_964_1                     0x88d0
#define PCI_DEVICE_ID_S3_964_2                     0x88d1
#define PCI_DEVICE_ID_S3_968                       0x88f0
#define PCI_DEVICE_ID_S3_TRIO64V2                  0x8901
#define PCI_DEVICE_ID_S3_PLATO_PXG                 0x8902
#define PCI_DEVICE_ID_S3_ViRGE_DXGX                0x8a01
#define PCI_DEVICE_ID_S3_ViRGE_GX2                 0x8a10
#define PCI_DEVICE_ID_S3_ViRGE_MX                  0x8c01
#define PCI_DEVICE_ID_S3_ViRGE_MXP                 0x8c02
#define PCI_DEVICE_ID_S3_ViRGE_MXPMV               0x8c03
#define PCI_DEVICE_ID_S3_SONICVIBES                0xca00

#define PCI_VENDOR_ID_INTEL                        0x8086
#define PCI_DEVICE_ID_INTEL_82375                  0x0482
#define PCI_DEVICE_ID_INTEL_82424                  0x0483
#define PCI_DEVICE_ID_INTEL_82378                  0x0484
#define PCI_DEVICE_ID_INTEL_82430                  0x0486
#define PCI_DEVICE_ID_INTEL_82434                  0x04a3
#define PCI_DEVICE_ID_INTEL_82092AA_0              0x1221
#define PCI_DEVICE_ID_INTEL_82092AA_1              0x1222
#define PCI_DEVICE_ID_INTEL_7116                   0x1223
#define PCI_DEVICE_ID_INTEL_82596                  0x1226
#define PCI_DEVICE_ID_INTEL_82865                  0x1227
#define PCI_DEVICE_ID_INTEL_82557                  0x1229
#define PCI_DEVICE_ID_INTEL_82437                  0x122d
#define PCI_DEVICE_ID_INTEL_82371FB_0              0x122e
#define PCI_DEVICE_ID_INTEL_82371FB_1              0x1230
#define PCI_DEVICE_ID_INTEL_82371MX                0x1234
#define PCI_DEVICE_ID_INTEL_82437MX                0x1235
#define PCI_DEVICE_ID_INTEL_82441                  0x1237
#define PCI_DEVICE_ID_INTEL_82380FB                0x124b
#define PCI_DEVICE_ID_INTEL_82439                  0x1250
#define PCI_DEVICE_ID_INTEL_82371SB_0              0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1              0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2              0x7020
#define PCI_DEVICE_ID_INTEL_82437VX                0x7030
#define PCI_DEVICE_ID_INTEL_82439TX                0x7100
#define PCI_DEVICE_ID_INTEL_82371AB_0              0x7110
#define PCI_DEVICE_ID_INTEL_82371AB                0x7111
#define PCI_DEVICE_ID_INTEL_82371AB_2              0x7112
#define PCI_DEVICE_ID_INTEL_82371AB_3              0x7113
#define PCI_DEVICE_ID_INTEL_82443LX_0              0x7180
#define PCI_DEVICE_ID_INTEL_82443LX_1              0x7181
#define PCI_DEVICE_ID_INTEL_82443BX_0              0x7190
#define PCI_DEVICE_ID_INTEL_82443BX_1              0x7191
#define PCI_DEVICE_ID_INTEL_82443BX_2              0x7192
#define PCI_DEVICE_ID_INTEL_P6                     0x84c4
#define PCI_DEVICE_ID_INTEL_82450GX                0x84c5

#define PCI_VENDOR_ID_KTI                          0x8e2e
#define PCI_DEVICE_ID_KTI_ET32P2                   0x3000

#define PCI_VENDOR_ID_ADAPTEC                      0x9004
#define PCI_DEVICE_ID_ADAPTEC_7810                 0x1078
#define PCI_DEVICE_ID_ADAPTEC_7850                 0x5078
#define PCI_DEVICE_ID_ADAPTEC_7855                 0x5578
#define PCI_DEVICE_ID_ADAPTEC_5800                 0x5800
#define PCI_DEVICE_ID_ADAPTEC_1480A                0x6075
#define PCI_DEVICE_ID_ADAPTEC_7860                 0x6078
#define PCI_DEVICE_ID_ADAPTEC_7861                 0x6178
#define PCI_DEVICE_ID_ADAPTEC_7870                 0x7078
#define PCI_DEVICE_ID_ADAPTEC_7871                 0x7178
#define PCI_DEVICE_ID_ADAPTEC_7872                 0x7278
#define PCI_DEVICE_ID_ADAPTEC_7873                 0x7378
#define PCI_DEVICE_ID_ADAPTEC_7874                 0x7478
#define PCI_DEVICE_ID_ADAPTEC_7895                 0x7895
#define PCI_DEVICE_ID_ADAPTEC_7880                 0x8078
#define PCI_DEVICE_ID_ADAPTEC_7881                 0x8178
#define PCI_DEVICE_ID_ADAPTEC_7882                 0x8278
#define PCI_DEVICE_ID_ADAPTEC_7883                 0x8378
#define PCI_DEVICE_ID_ADAPTEC_7884                 0x8478
#define PCI_DEVICE_ID_ADAPTEC_1030                 0x8b78

#define PCI_VENDOR_ID_ADAPTEC2                     0x9005
#define PCI_DEVICE_ID_ADAPTEC2_2940U2              0x0010
#define PCI_DEVICE_ID_ADAPTEC2_7890                0x001f
#define PCI_DEVICE_ID_ADAPTEC2_3940U2              0x0050
#define PCI_DEVICE_ID_ADAPTEC2_7896                0x005f

#define PCI_VENDOR_ID_ATRONICS                     0x907f
#define PCI_DEVICE_ID_ATRONICS_2015                0x2015

#define PCI_VENDOR_ID_HOLTEK                       0x9412
#define PCI_DEVICE_ID_HOLTEK_6565                  0x6565

#define PCI_VENDOR_ID_TIGERJET                     0xe159
#define PCI_DEVICE_ID_TIGERJET_300                 0x0001

#define PCI_VENDOR_ID_ARK                          0xedd8
#define PCI_DEVICE_ID_ARK_STING                    0xa091
#define PCI_DEVICE_ID_ARK_STINGARK                 0xa099
#define PCI_DEVICE_ID_ARK_2000MT                   0xa0a1
/*
 * The PCI interface treats multi-function devices as independent
 * devices.  The slot/function address of each device is encoded
 * in a single byte as follows:
 *
 *  7:3 = slot
 *  2:0 = function
 */
#define PCI_DEVFN(_slot,_func) ((((_slot) & 0x1f) << 3) | ((_func) & 0x07))
#define PCI_SLOT(_devfn)      (((_devfn) >> 3) & 0x1f)
#define PCI_FUNC(_devfn)      ((_devfn) & 0x07)

/*
 * Error values that may be returned by the PCI bios.
 */
#define PCIBIOS_SUCCESSFUL          0x00
#define PCIBIOS_FUNC_NOT_SUPPORTED  0x81
#define PCIBIOS_BAD_VENDOR_ID       0x83
#define PCIBIOS_DEVICE_NOT_FOUND    0x86
#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
#define PCIBIOS_SET_FAILED          0x88
#define PCIBIOS_BUFFER_TOO_SMALL    0x89

/* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not
 * scanned on mvme2306 otherwise
 */
#define PCI_MAX_DEVICES      32
#define PCI_MAX_FUNCTIONS    8

typedef struct  {
  int (*read_config_byte)(unsigned char, unsigned char,  unsigned char,
                          unsigned char, unsigned char *);
  int (*read_config_word)(unsigned char, unsigned char,  unsigned char,
                          unsigned char, unsigned short *);
  int (*read_config_dword)(unsigned char, unsigned char,  unsigned char,
                           unsigned char, unsigned int *);
  int (*write_config_byte)(unsigned char, unsigned char,  unsigned char,
                           unsigned char, unsigned char);
  int (*write_config_word)(unsigned char, unsigned char,  unsigned char,
                           unsigned char, unsigned short);
  int (*write_config_dword)(unsigned char, unsigned char,  unsigned char,
                            unsigned char, unsigned int);
} pci_config_access_functions;

/* Error codes for pci_initialize */
#define PCIB_ERR_SUCCESS       (0)
#define PCIB_ERR_UNINITIALIZED (-1)  /* PCI BIOS is not initilized */
#define PCIB_ERR_NOTPRESENT    (-2)  /* PCI BIOS not present */
#define PCIB_ERR_NOFUNC        (-3)  /* Function not supported */
#define PCIB_ERR_BADVENDOR     (-4)  /* Bad Vendor ID */
#define PCIB_ERR_DEVNOTFOUND   (-5)  /* Device not found */
#define PCIB_ERR_BADREG        (-6)  /* Bad register number */

extern int pci_initialize();

typedef struct {
  volatile unsigned char*            pci_config_addr;
  volatile unsigned char*            pci_config_data;
  const pci_config_access_functions* pci_functions;
} pci_config;

extern pci_config BSP_pci_configuration;

extern inline int
pci_read_config_byte(
  unsigned char bus,
  unsigned char slot,
  unsigned char function,
  unsigned char where,
  unsigned char * val)
{
  return BSP_pci_configuration.pci_functions->read_config_byte(
            bus, slot, function, where, val);
}

extern inline int
pci_read_config_word(
  unsigned char bus,
  unsigned char slot,
  unsigned char function,
  unsigned char where,
  unsigned short * val)
{
  return BSP_pci_configuration.pci_functions->read_config_word(
             bus, slot, function, where, val);
}

extern inline int
pci_read_config_dword(
  unsigned char bus,
  unsigned char slot,
  unsigned char function,
  unsigned char where,
  unsigned int * val)
{
  return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
}

extern inline int
pci_write_config_byte(
  unsigned char bus, 
  unsigned char slot, 
  unsigned char function,
  unsigned char where, 
  unsigned char val)
{
  return BSP_pci_configuration.pci_functions->write_config_byte(
             bus, slot, function, where, val);
}

extern inline int
pci_write_config_word(
  unsigned char bus,
  unsigned char slot,
  unsigned char function,
  unsigned char where,
  unsigned short val)
{
  return BSP_pci_configuration.pci_functions->write_config_word(
              bus, slot, function, where, val);
}

extern inline int
pci_write_config_dword(
  unsigned char bus,
  unsigned char slot,
  unsigned char function,
  unsigned char where,
  unsigned int val)
{
  return BSP_pci_configuration.pci_functions->write_config_dword(
      bus, slot, function, where, val);
}

/* scan for a specific device */
/* find a particular PCI device
 * (currently, only bus0 is scanned for device/fun0)
 *
 * RETURNS: zero on success, bus/dev/fun in *pbus / *pdev / *pfun
 */
int
pci_find_device(
  unsigned short vendorid,
  unsigned short deviceid,
  int instance,
  int *pbus,
  int *pdev,
  int *pfun
);

/*
 * Return the number of PCI busses in the system
 */
extern unsigned char pci_bus_count();

#endif /* _RTEMS_PCI_H */