pipemult_lc_02.hif

使用Quartus II 5.0开发指导手册

Version 5.0 Build 148 04/26/2005 SJ Full Version
7
487
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
pipemult
# case_insensitive
# source_file
pipemult.bdf
1117182784
23
# storage
db|pipemult.(0).cnf
db|pipemult.(0).cnf
# end
# entity
ram
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
ram.vhd
1088077224
4
# storage
db|pipemult.(1).cnf
db|pipemult.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# end
# entity
mult
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
mult.v
1117182530
7
# storage
db|pipemult.(2).cnf
db|pipemult.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# end
# entity
lpm_mult
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_mult.tdf
1114012452
6
# storage
db|pipemult.(3).cnf
db|pipemult.(3).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTHA
8
PARAMETER_DEC
USR
LPM_WIDTHB
8
PARAMETER_DEC
USR
LPM_WIDTHP
16
PARAMETER_DEC
USR
LPM_WIDTHR
0
PARAMETER_UNKNOWN
DEF
LPM_WIDTHS
1
PARAMETER_DEC
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
2
PARAMETER_DEC
USR
LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_A_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
INPUT_B_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
USE_EAB
OFF
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
APEX20K_TECHNOLOGY_MAPPER
Lut
TECH_MAPPER_APEX20K
USR
DEDICATED_MULTIPLIER_CIRCUITRY
AUTO
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_edq
PARAMETER_UNKNOWN
USR
INPUT_A_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
INPUT_B_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
}
# used_port {
aclr
clken
clock
dataa
dataa
dataa
dataa
dataa
dataa
dataa
dataa
datab
datab
datab
datab
datab
datab
datab
datab
result
result
result
result
result
result
result
result
result
result
result
result
result
result
result
result
sum
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
c:|altera|quartus50|libraries|megafunctions|multcore.inc
1107575210
c:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
c:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
}
# end
# entity
mult_edq
# case_insensitive
# source_file
db|mult_edq.tdf
1117182788
6
# storage
db|pipemult.(4).cnf
db|pipemult.(4).cnf
# user_parameter {
dataa_width
1
PARAMETER_UNKNOWN
DEF
datab_width
1
PARAMETER_UNKNOWN
DEF
datac_width
1
PARAMETER_UNKNOWN
DEF
datad_width
1
PARAMETER_UNKNOWN
DEF
dataout_width
144
PARAMETER_UNKNOWN
DEF
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
clock
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
}
# end
# entity
altsyncram
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|altsyncram.tdf
1114012438
6
# storage
db|pipemult.(5).cnf
db|pipemult.(5).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_UNKNOWN
USR
WIDTHAD_A
5
PARAMETER_UNKNOWN
USR
NUMWORDS_A
32
PARAMETER_UNKNOWN
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
16
PARAMETER_UNKNOWN
USR
WIDTHAD_B
5
PARAMETER_UNKNOWN
USR
NUMWORDS_B
32
PARAMETER_UNKNOWN
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_1p51
PARAMETER_UNKNOWN
USR
}
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_b0
address_b1
address_b2
address_b3
address_b4
clock0
clock1
data_a0
data_a10
data_a11
data_a12
data_a13
data_a14
data_a15
data_a1
data_a2
data_a3
data_a4
data_a5
data_a6
data_a7
data_a8
data_a9
q_b0
q_b10
q_b11
q_b12
q_b13
q_b14
q_b15
q_b1
q_b2
q_b3
q_b4
q_b5
q_b6
q_b7
q_b8
q_b9
wren_a
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|stratix_ram_block.inc
1107575592
c:|altera|quartus50|libraries|megafunctions|lpm_mux.inc
1107574776
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
c:|altera|quartus50|libraries|megafunctions|altsyncram.inc
1107573506
c:|altera|quartus50|libraries|megafunctions|a_rdenreg.inc
1107572148
c:|altera|quartus50|libraries|megafunctions|altrom.inc
1107573422
c:|altera|quartus50|libraries|megafunctions|altram.inc
1107573384
c:|altera|quartus50|libraries|megafunctions|altdpram.inc
1107573082
c:|altera|quartus50|libraries|megafunctions|altqpram.inc
1107573362
}
# end
# entity
lpm_mult
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_mult.tdf
1114012452
6
# storage
db|pipemult_lc_02.(6).cnf
db|pipemult_lc_02.(6).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTHA
8
PARAMETER_DEC
USR
LPM_WIDTHB
8
PARAMETER_DEC
USR
LPM_WIDTHP
16
PARAMETER_DEC
USR
LPM_WIDTHR
0
PARAMETER_UNKNOWN
DEF
LPM_WIDTHS
1
PARAMETER_DEC
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
2
PARAMETER_DEC
USR
LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_A_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
INPUT_B_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
USE_EAB
OFF
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
APEX20K_TECHNOLOGY_MAPPER
Lut
TECH_MAPPER_APEX20K
USR
DEDICATED_MULTIPLIER_CIRCUITRY
AUTO
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_0cr
PARAMETER_UNKNOWN
USR
INPUT_A_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
INPUT_B_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
}
# used_port {
aclr
clken
clock
dataa
dataa
dataa
dataa
dataa
dataa
dataa
dataa
datab
datab
datab
datab
datab
datab
datab
datab
result
result
result
result
result
result
result
result
result
result
result
result
result
result
result
result
sum
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
c:|altera|quartus50|libraries|megafunctions|multcore.inc
1107575210
c:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
c:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
}
# end
# entity
mult_0cr
# case_insensitive
# source_file
db|mult_0cr.tdf
1117182940
6
# storage
db|pipemult_lc_02.(7).cnf
db|pipemult_lc_02.(7).cnf
# user_parameter {
dataa_width
1
PARAMETER_UNKNOWN
DEF
datab_width
1
PARAMETER_UNKNOWN
DEF
datac_width
1
PARAMETER_UNKNOWN
DEF
datad_width
1
PARAMETER_UNKNOWN
DEF
dataout_width
144
PARAMETER_UNKNOWN
DEF
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
clock
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
}
# end
# entity
alt_mac_mult
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|alt_mac_mult.tdf
1114012446
6
# storage
db|pipemult_lc_02.(9).cnf
db|pipemult_lc_02.(9).cnf
# user_parameter {
LPM_WIDTHS
1
PARAMETER_DEC