pipemult_lc_phys_syn.qsf

使用Quartus II 5.0开发指导手册

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		pipemult_lc_phys_syn_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:06:09  MAY 27, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VHDL_FILE ram.vhd
set_global_assignment -name BDF_FILE pipemult.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment IOBANK_2 -to dataa
set_location_assignment IOBANK_2 -to datab
set_location_assignment IOBANK_3 -to q
set_location_assignment PIN_E13 -to ~DATA0~
set_location_assignment PIN_A13 -to q[15]
set_location_assignment PIN_E14 -to q[14]
set_location_assignment PIN_C13 -to q[13]
set_location_assignment PIN_F14 -to q[12]
set_location_assignment PIN_B13 -to q[11]
set_location_assignment PIN_G14 -to q[10]
set_location_assignment PIN_D13 -to q[9]
set_location_assignment PIN_H14 -to q[8]
set_location_assignment PIN_D12 -to q[7]
set_location_assignment PIN_D15 -to q[6]
set_location_assignment PIN_H11 -to q[5]
set_location_assignment PIN_F16 -to q[4]
set_location_assignment PIN_E11 -to q[3]
set_location_assignment PIN_J15 -to q[2]
set_location_assignment PIN_G12 -to q[1]
set_location_assignment PIN_E15 -to q[0]
set_location_assignment PIN_C22 -to dataa[7]
set_location_assignment PIN_C21 -to dataa[6]
set_location_assignment PIN_D22 -to dataa[5]
set_location_assignment PIN_G18 -to dataa[4]
set_location_assignment PIN_D21 -to dataa[3]
set_location_assignment PIN_G17 -to dataa[2]
set_location_assignment PIN_E22 -to dataa[1]
set_location_assignment PIN_F20 -to dataa[0]
set_location_assignment PIN_E20 -to datab[7]
set_location_assignment PIN_E19 -to datab[6]
set_location_assignment PIN_F19 -to datab[5]
set_location_assignment PIN_E21 -to datab[4]
set_location_assignment PIN_F22 -to datab[3]
set_location_assignment PIN_H18 -to datab[2]
set_location_assignment PIN_F21 -to datab[1]
set_location_assignment PIN_H17 -to datab[0]
set_location_assignment PIN_H21 -to rdaddress[4]
set_location_assignment PIN_J19 -to rdaddress[3]
set_location_assignment PIN_H22 -to rdaddress[2]
set_location_assignment PIN_J16 -to rdaddress[1]
set_location_assignment PIN_G21 -to rdaddress[0]
set_location_assignment PIN_J17 -to wraddress[4]
set_location_assignment PIN_G22 -to wraddress[3]
set_location_assignment PIN_G19 -to wraddress[2]
set_location_assignment PIN_H19 -to wraddress[1]
set_location_assignment PIN_G20 -to wraddress[0]
set_location_assignment PIN_N20 -to clk1
set_location_assignment PIN_H20 -to wren

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
set_global_assignment -name FAMILY "Stratix II"
set_global_assignment -name TOP_LEVEL_ENTITY pipemult

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2S15F484C3
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_instance_assignment -name IO_STANDARD "2.5 V" -to dataa
set_instance_assignment -name IO_STANDARD "2.5 V" -to datab
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name VECTOR_INPUT_SOURCE pipemult.vwf

# -----------------
# start CLOCK(clk1)

	# Timing Assignments
	# ==================
	set_global_assignment -name FMAX_REQUIREMENT "250.0 MHz" -section_id clk1

# end CLOCK(clk1)
# ---------------

# ----------------------
# start ENTITY(pipemult)

	# Timing Assignments
	# ==================
	set_instance_assignment -name CLOCK_SETTINGS clk1 -to clk1
	set_instance_assignment -name INPUT_MAX_DELAY 3.5ns -from * -to data*

	# Analysis & Synthesis Assignments
	# ================================
	set_instance_assignment -name DSP_BLOCK_BALANCING "LOGIC ELEMENTS" -to "mult:inst"

# end ENTITY(pipemult)
# --------------------