counter_100.qsf

使用Quartus II 5.0开发指导手册

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:45:11  JANUARY 22, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION 4.0
set_global_assignment -name VECTOR_WAVEFORM_FILE counter_100.vwf
set_global_assignment -name MIF_FILE row_mem.mif


# Pin & Location Assignments
# ==========================
set_location_assignment PIN_G1 -to CLK
set_location_assignment PIN_M4 -to ROW_OUT\[0\]
set_location_assignment PIN_N1 -to ROW_OUT\[1\]
set_location_assignment PIN_N2 -to ROW_OUT\[2\]
set_location_assignment PIN_N3 -to ROW_OUT\[3\]
set_location_assignment PIN_N4 -to ROW_OUT\[4\]
set_location_assignment PIN_P2 -to ROW_OUT\[5\]
set_location_assignment PIN_P3 -to ROW_OUT\[6\]
set_location_assignment PIN_L4 -to TENS_OUT\[5\]
set_location_assignment PIN_L3 -to TENS_OUT\[4\]
set_location_assignment PIN_L2 -to TENS_OUT\[3\]
set_location_assignment PIN_L1 -to TENS_OUT\[2\]
set_location_assignment PIN_K5 -to TENS_OUT\[1\]
set_location_assignment PIN_K1 -to TENS_OUT\[0\]
set_location_assignment PIN_G5 -to ONES_OUT\[5\]
set_location_assignment PIN_G3 -to ONES_OUT\[4\]
set_location_assignment PIN_G2 -to ONES_OUT\[3\]
set_location_assignment PIN_F5 -to ONES_OUT\[2\]
set_location_assignment PIN_F4 -to ONES_OUT\[1\]
set_location_assignment PIN_F3 -to ONES_OUT\[0\]
set_location_assignment PIN_R1 -to ROW_OUT\[7\]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 256
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name SPEED_DISK_USAGE_TRADEOFF NORMAL
set_global_assignment -name TOP_LEVEL_ENTITY COUNTER_100

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6F256C6
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[7\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[0\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to CLK
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[0\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[1\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[2\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[3\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[4\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[5\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ROW_OUT\[6\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[5\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[4\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[3\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[2\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[1\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to TENS_OUT\[0\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[5\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[4\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[3\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[2\]
set_instance_assignment -name IO_STANDARD "2.5 V" -to ONES_OUT\[1\]

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL "1.0 ns"
set_global_assignment -name POWER_ESTIMATION_START_TIME "0.0 ns"
set_global_assignment -name SIMULATION_MODE FUNCTIONAL

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT off