mem_count.vhd

使用Quartus II 5.0开发指导手册

-----------------------------------------
--    QUARTUS II TECHNICAL TRAINING    --
--       Clearable 3-bit counter       --
-----------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity MEM_COUNT is
	port
	(
		CLK                 : in    std_logic;
		RESET				: in	std_logic;
		CNT 				: out	std_logic_vector(2 downto 0)
	);
end MEM_COUNT;

architecture LOGIC of MEM_COUNT is

	signal	CNT_INT	: std_logic_vector(17 downto 0);
	
BEGIN

	process (CLK, RESET)
	begin
		if RESET = '0' then
			CNT_INT <= (OTHERS => '0');
		elsif rising_edge(CLK) then
			if CNT_INT = "100000000000000000" then
				CNT_INT <= (OTHERS => '0');
			else
				CNT_INT <= CNT_INT + '1';	
			end if;		
		end if;
	end process;

	CNT <= CNT_INT(16 downto 14);
	
END LOGIC;