td1120p.h

Usb Host/Periphel Control TD1120 codes

/*-----------------------------------------------------------------------------
$File: //tdi_sw/tdi/source/usb/ctrl_drv/pcd/td1120/td1120p.h $
$DateTime: 2004/12/20 19:06:16 $
$Revision: #6 $
Purpose:   Public interface to tahaa

CONFIDENTIAL AND PROPRIETARY INFORMATION OF SOFTCONNEX TECHNOLOGIES, INC.

Copyright (c) 1999 - 2004 by SoftConnex Technologies, Inc. 

This software is protected by copyright laws and international copyright 
treaties, as well as other intellectual property laws and treaties.  This
software is a CONFIDENTIAL, unpublished work of authorship, and with portions 
constituting TRADE SECRETS of SoftConnex Technologies, Inc., a Delaware USA 
corporation.  Any unauthorized use, disclosure,   and/or reproduction of this 
software, or any part of this software; or distribution of this software in any 
form or by any means; or storage of this software in any database or retrieval 
system, without the express written consent of, and license from, SoftConnex 
Technologies, Inc. is strictly prohibited.  This software is protected under the
copyright and/or trade secret laws in other countries in addition to USA.  All 
Rights Reserved.  Failure to abide by the use, disclosure and/or reproduction 
restrictions may result in civil and /or criminal penalties, and will be 
prosecuted to the maximum extent of   the law.
-----------------------------------------------------------------------------*/

#ifndef _TDI_PCD1120_H_
#define _TDI_PCD1120_H_

#define TD1120_DC_NAME_STRING       "TD1120 DCD"
#define TD1120_DC_REVISION_STRING   "1.0.0"
#define TD1120_DC_BUILD_STRING      "1000"

#define USBLINK_ID_DC_TD1120                      0xF000000B

/******************************************************************************
 Include Files
******************************************************************************/
#include "sc_types.h"

/******************************************************************************
 Public Definitions
******************************************************************************/

#define TD1120_CONTROLLER_ID                    0x1120
#define TD1120_DEV_MAX_EP                       8
#define TD1120_DEV_FIFO_SIZE                    1536
#define FEATURE_DWORD_EN                        1

/*------------------------------------------------------------------------------
                    TAHAA CHIP LEVEL REGISTERS
------------------------------------------------------------------------------*/
#define TD1120_REVISION_REG                    0x3E
#define TD1120_HARDWARE_MODE_SET               0x40
#define TD1120_INTR_ENABLE_SET                 0x48
#define TD1120_INTR_ENABLE_CLEAR               0x4C
#define TD1120_CLOCL_SET                       0x50

#define TD1120_CONTROLLER_ID_BITS              0x0000FFFF
#define TD1120_HARDWARE_MODE_COMPARATOR        0x00000400
#define TD1120_HARDWARE_MODE_HOST_ONLY         0x00000002
#define TD1120_INTR_ENABLE_PERIPHERAL          0x00000002
#define TD1120_CLOCK_SET_PERIPHERAL            0x00000004

#define TD1120_DEV_ADDRESS_BASE				      0x800
#define TD1120_DEV_REVISION_REG                 (0+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_ADDRESS_REG                  (0x4+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_FRAME_NUM_REG                (0x8+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_VALIDATION_REG         (0xC+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_CTRL_SET_REG                 (0x10+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_CTRL_CLEAR_REG               (0x14+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_INTR_STATUS_REG              (0x18+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_INTR_CLEAR_REG               (0x1C+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_INTR_ENABLES_SET_REG         (0x20+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_INTR_ENABLES_CLEAR_REG       (0x24+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_DMA_CFG_REG                  (0x28+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_DMA_CTRL_REG                 (0x2C+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_DMA_INTR_STATUS_REG          (0x30+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_DMA_XFER_LEN_REG             (0x34+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_TEST_MODE_REG                (0x38+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_EN_SET_REG            (0x40+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_EN_CLEAR_REG          (0x44+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_EN_SET_REG             (0x48+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_EN_CLEAR_REG           (0x4C+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_STALLS_SET_REG        (0x50+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_STALLS_CLEAR_REG      (0x54+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_STALLS_SET_REG         (0x58+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_STALLS_CLEAR_REG       (0x5C+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_NAK_SET_REG           (0x60+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_NAK_CLEAR_REG         (0x64+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_XFER_RCVD_REG         (0x68+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_XFER_SENT_REG          (0x6C+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_TOGGLE_BITS_CLEAR_REG (0x70+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_TOGGLE_BITS_CLEAR_REG  (0x74+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_SETUP_RCVD_REG            (0x78+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_THRSHLD_AVAIL_REG     (0x80+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_THRSHLD_AVAIL_REG      (0x84+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_FIFO_CLEAR_REG        (0x90+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_IN_FIFO_CLEAR_REG         (0x94+TD1120_DEV_ADDRESS_BASE)
#define TD1120_DEV_EP_OUT_BYTE_COUNT_REG(epnum) ((0xC0+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 2))
#define TD1120_DEV_EP_IN_BYTE_COUNT_REG(epnum)  ((0x100+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 2))
#define TD1120_DEV_EP_IN_XFER_COUNT_REG(epnum)  ((0x140+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 2))
#define TD1120_DEV_EP_OUT_PKT_COUNT_REG(epnum)  ((0x180+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 2))
#define TD1120_DEV_EP_DESCR_REG(epnum)          ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x00)
#define TD1120_DEV_EP_FIFO_THRESHOLD(epnum)     ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x04)
#define TD1120_DEV_EP_OUT_FIFO_START(epnum)     ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x08)
#define TD1120_DEV_EP_OUT_FIFO_END(epnum)       ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x0C)
#define TD1120_DEV_EP_IN_FIFO_START(epnum)      ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x10)
#define TD1120_DEV_EP_IN_FIFO_END(epnum)        ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x14)
#define TD1120_DEV_EP_OUT_FIFO_READ(epnum)      ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x18)
#define TD1120_DEV_EP_IN_FIFO_WRITE(epnum)      ((0x200+TD1120_DEV_ADDRESS_BASE) +  ((epnum) << 5) + 0x1C)

/*------------------------------------------------------------------------------
            TAHAA CHIP LEVEL REGISTERS : REVISION REGISTER
------------------------------------------------------------------------------*/
#define TD1120_REVISION                          0x00FF

/*------------------------------------------------------------------------------
            TAHAA CHIP LEVEL REGISTERS : ADDRESS REGISTER
------------------------------------------------------------------------------*/
#define TD1120_DEVICE_ADDRESS                    0x007F

/*------------------------------------------------------------------------------
            TAHAA CHIP LEVEL REGISTERS : FRAME/UFRAME REGISTER
------------------------------------------------------------------------------*/
#define TD1120_DEV_FRAME_NUMBER                  0x07FF
#define TD1120_DEV_UFRAME_NUMBER                 0x3800

/*------------------------------------------------------------------------------
            TAHAA CHIP LEVEL REGISTERS : EP VALIDATION REGISTER
------------------------------------------------------------------------------*/
#define TD1120_DEV_EP_VALIDATION_CODE_MASK       0x0007
#define TD1120_DEV_EP_VALIDATION_EP_NUM_SHIFT    4

#define TD1120_DEV_EP_VALID_CODE_1_BYTE          0x1
#define TD1120_DEV_EP_VALID_CODE_2_BYTES         0x2
#define TD1120_DEV_EP_VALID_CODE_3_BYTES         0x3
#define TD1120_DEV_EP_VALID_CODE_4_BYTES         0x4
#define TD1120_DEV_EP_VALID_CODE_4_BYTES_0_LEN   0x6