📄 hnp.c
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/*-----------------------------------------------------------------------------
$File: //hodad/usblink/3.4/source/hostctrl/otg242/hnp.c $
$DateTime: 2003/09/08 15:17:45 $
$Revision: #1 $
Purpose: OTG242 Host Negotiation Protocol operations.
CONFIDENTIAL AND PROPRIETARY INFORMATION OF SOFTCONNEX TECHNOLOGIES, INC.
THIS NOTICE IS NOT TO BE DELETED, MODIFIED, MOVED OR CHANGED IN ANY WAY.
Copyright (c) 1999 - 2003 by SoftConnex Technologies, Inc.
This software is protected by copyright laws and international copyright
treaties, as well as other intellectual property laws and treaties. This
software is a CONFIDENTIAL, unpublished work of authorship, and with portions
constituting TRADE SECRETS of SoftConnex Technologies, Inc., a Delaware USA
corporation. Any unauthorized use, disclosure, and/or reproduction of this
software, or any part of this software; or distribution of this software in any
form or by any means; or storage of this software in any database or retrieval
system, without the express written consent of, and license from, SoftConnex
Technologies, Inc. is strictly prohibited. This software is protected under the
copyright and/or trade secret laws in other countries in addition to USA. All
Rights Reserved. Failure to abide by the use, disclosure and/or reproduction
restrictions may result in civil and /or criminal penalties, and will be
prosecuted to the maximum extent of the law.
-----------------------------------------------------------------------------*/
#include "usblink.h"
#include "top.h"
#include "hnp.h"
SctStatus OTG242HNP_Create(Otg242Hnp *hnp, Otg242 *otg)
{
U32 mode;
U32 revision;
U32 Read;
#ifdef OTG242_HARDWARE_HNP
U32 status;
#endif
#ifdef OTG242_SOFTWARE_HNP
U32 status;
#endif
Read = 0;
hnp->otg = otg;
hnp->workingState = OTG242HNP_MNP_NOT_ENABLED;
mode = OTG242HNP_ReadReg(hnp, OTG242_MODE);
mode &= ~OTG242_MODE_HF;
#ifdef OTG242_HOST_ONLY
hnp->otgPortMode = OTG242_MODE_HF_HOST_ONLY;
mode |= OTG242_MODE_HF_HOST_ONLY;
OTG242HNP_WriteReg(hnp, OTG242_MODE, mode);
revision = OTG242HNP_ReadReg(hnp, OTG242_REVISION);
if( revision != OTG242_CHIP_REV_A )
{
if( revision != OTG242_CHIP_REV_B )
{
PRINT1("OTG242HNP: Unmatched HC Revision\n");
return SCC_FALSE;
}
}
PRINT1("OTG242HNP: Working as host only\n");
if( revision == OTG242_CHIP_REV_A )
{
PRINT1("OTG242HNP: OTG242 Rev A part\n");
}
else
{
PRINT1("OTG242HNP: OTG242 Rev B part\n");
}
#endif
#ifdef OTG242_FUNCTION_ONLY
hnp->otgPortMode = OTG242_MODE_HF_FUNCTION_ONLY;
mode |= OTG242_MODE_HF_FUNCTION_ONLY;
OTG242HNP_WriteReg(hnp, OTG242_MODE, mode);
/* if force function mode need to pull up DP to get a port connection */
Read = OTG242HNP_ReadReg(hnp, OTG242_HNPCONTROLSTATUS);
OTG242HNP_WriteReg(hnp, OTG242_HNPCONTROLSTATUS, Read | OTG242HNP_CTRL_SWPUDP);
revision = OTG242HNP_ReadReg(hnp, OTG242_REVISION);
if((revision & OTG242FC_REVISION_REVISION) != OTG242FC_REVISION_NOMINAL)
{
OS_DEBUG_MSG2(OS_ZONE_INIT, "OTG242HNP: Unmatched FC Revision 0x%08X\r\n", revision);
return SCC_FALSE;
}
OS_DEBUG_MSG2(OS_ZONE_INIT, "OTG242HNP: Working as function only 0x%08X\r\n", revision);
#endif
#ifdef OTG242_HARDWARE_HNP
hnp->otgPortMode = OTG242_MODE_HF_HARDWARE_HNP;
mode |= OTG242_MODE_HF_HARDWARE_HNP;
OTG242HNP_WriteReg(hnp, OTG242_MODE, mode);
/*****************************************************
Set AWaitBReset to 31ms.
*****************************************************/
mode = OTG242HNP_ReadReg(hnp, OTG242_MODE);
OS_DEBUG_MSG2(OS_ZONE_INIT, "OTG242HNP: Working as Hareware HNP Mode 0x%08X\r\n", mode);
#ifndef OTG242_FPGA
status = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
status |= OTG242HNP_CTRL_COMPARATOR_ENABLE;
OTG242HNP_WriteReg(hnp, OTG242HNP_CTRL, status);
#endif
status = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
if (status & OTG242HNP_CTRL_IS_A_DEVICE)
{
hnp->workingState = OTG242HNP_A_IDLE;
}
else
{
hnp->workingState = OTG242HNP_B_IDLE;
}
#endif
#ifdef OTG242_SOFTWARE_HNP
hnp->otgPortMode = OTG242_MODE_HF_SOFTWARE_HNP;
mode |= OTG242_MODE_HF_SOFTWARE_HNP;
OTG242HNP_WriteReg(hnp, OTG242_MODE, mode);
/*****************************************************
Set AWaitBReset to 31ms.
*****************************************************/
mode = OTG242HNP_ReadReg(hnp, OTG242_MODE);
OS_DEBUG_MSG2(OS_ZONE_INIT, "OTG242HNP: Working as Software HNP Mode 0x%08X\r\n", mode);
#ifndef OTG242_FPGA
status = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
status |= OTG242HNP_CTRL_COMPARATOR_ENABLE;
OTG242HNP_WriteReg(hnp, OTG242HNP_CTRL, status);
#endif
status = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
if (status & OTG242HNP_CTRL_IS_A_DEVICE)
{
hnp->workingState = OTG242HNP_A_IDLE;
}
else
{
hnp->workingState = OTG242HNP_B_IDLE;
}
#endif
/* need to enable HNP interrupt here */
return SCC_TRUE;
}
SctStatus OTG242HNP_Initialize(Otg242Hnp *hnp)
{
hnp->status = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
hnp->status &= ~(OTG242HNP_CTRL_BUS_DROP |
OTG242HNP_CTRL_B_HNP_ENABLE );
hnp->status |= (OTG242HNP_CTRL_BUS_REQUEST |
OTG242HNP_CTRL_COMPARATOR_ENABLE);
OTG242HNP_WriteReg(hnp, OTG242HNP_CTRL, hnp->status);
return SCC_TRUE;
}
void OTG242HNP_Delete(Otg242Hnp *hnp)
{
}
void OTG242HNP_IntrHandler(Otg242Hnp *hnp, U32 status)
{
U32 hnpStatus;
U32 portStatus;
U32 val;
S32 port;
/*********************************************************
Presume IdIsA is a_bus_req event, that is at the very
begining. Later while running, we could consider
a_bus_req as a variable.
*********************************************************/
if ( status & OTG242_INTR_STATUS_IDCHANGE )
{
val = OTG242HNP_ReadReg( hnp, OTG242_HNPCONTROLSTATUS );
if ( val & OTG242HNP_CTRL_IS_A_DEVICE )
{
/* if HNP control status is A-device */
OS_DEBUG_MSG1(OS_ZONE_INIT, "OTG242HNP: ID change A Int \r\n");
hnp->workingState = OTG242HNP_A_IDLE;
}
else if ( val & OTG242HNP_CTRL_IS_B_DEVICE )
{
/* if HNP control status is B-device */
OS_DEBUG_MSG1(OS_ZONE_INIT, "OTG242HNP: ID change B Int \r\n");
hnp->workingState = OTG242HNP_B_IDLE;
}
}
/***************************************************
OK, here, we got a srp requeset. if we are in
OTG242HNP_A_IDLE state. Well, at this time, no drive vbus,
no charge vbus, no local connection, no sof.
****************************************************/
if (status & OTG242_INTR_SRPINT)
{
hnpStatus = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
/**********************************************************
If we are A devcie and master, then process this Srp.
**********************************************************/
if ((hnpStatus & OTG242HNP_CTRL_IS_A_DEVICE) &&
((hnpStatus & OTG242HNP_CTRL_HNP_STATE) == OTG242HNP_CTRL_HNP_A_WAIT_B_REQ))
{
OS_DEBUG_MSG2(OS_ZONE_INIT, "OTG242HNP: got SRP in A-IDLE, mnp 0x%08X \r\n", hnpStatus);
if (hnp->otgPortMode == OTG242_MODE_HF_SOFTWARE_HNP)
{
hnpStatus |= OTG242HNP_CTRL_BUS_REQUEST;
}
else if (hnp->otgPortMode == OTG242_MODE_HF_HARDWARE_HNP)
{
hnpStatus |= OTG242HNP_CTRL_BUS_REQUEST;
}
hnpStatus &= ~OTG242HNP_CTRL_BUS_DROP;
OTG242HNP_WriteReg(hnp, OTG242HNP_CTRL, hnpStatus);
/* workingState = OTG242HNP_OTG242HNP_A_WAIT_VRISE; */
OS_Wait(150);
/*****************************************************
After sleeping for 150ms, Vbus supposed to be
ready, just read out bus valid bit to verify
*****************************************************/
hnpStatus = OTG242HNP_ReadReg(hnp, OTG242HNP_CTRL);
if ((hnpStatus & OTG242HNP_CTRL_VBUSGTAVV) == 0)
{
OS_DEBUG_MSG1(OS_ZONE_INIT, "OTG242HNP: V Bus still not valid after 150ms\r\n");
}
}
else
{
OS_DEBUG_MSG1(OS_ZONE_ERR, "OTG242HNP: got SRP other than A-IDLE, ignored \r\n");
}
}
/******************************************************
We are supposed to clear locl_conn according to
spec, but since we are towarding to be a peripheral,
we don't have to turn loc_conn off and on. instead,
I will go there directly. however, this needs to
be checked again, does the host side need B_DEVICE
to turn this off and on?
********************************************************/
if(status & OTG242_INTR_SRPSUCFAIL)
{
if ( (OTG242HNP_ReadReg(hnp, OTG242_MODE) & OTG242_MODE_HF)
== OTG242_MODE_HF_HARDWARE_HNP
)
{
OS_DEBUG_MSG1(OS_ZONE_INIT, "OTG242HNP: SRPSUCFAIL \r\n");
if (hnp->workingState == OTG242HNP_B_SRP_INIT)
{
hnp->workingState = OTG242HNP_B_IDLE;
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