top.c

Usb Host/Periphel Control TD1120 codes

/*-----------------------------------------------------------------------------
$File: //hodad/usblink/3.4/source/hostctrl/otg242/top.c $
$DateTime: 2003/11/21 14:48:39 $
$Revision: #5 $
Purpose:   OTG242 chip level operations.

CONFIDENTIAL AND PROPRIETARY INFORMATION OF SOFTCONNEX TECHNOLOGIES, INC.

THIS NOTICE IS NOT TO BE DELETED, MODIFIED, MOVED OR CHANGED IN ANY WAY.

Copyright (c) 1999 - 2003 by SoftConnex Technologies, Inc. 

This software is protected by copyright laws and international copyright 
treaties, as well as other intellectual property laws and treaties.  This
software is a CONFIDENTIAL, unpublished work of authorship, and with portions 
constituting TRADE SECRETS of SoftConnex Technologies, Inc., a Delaware USA 
corporation.  Any unauthorized use, disclosure, and/or reproduction of this 
software, or any part of this software; or distribution of this software in any 
form or by any means; or storage of this software in any database or retrieval 
system, without the express written consent of, and license from, SoftConnex 
Technologies, Inc. is strictly prohibited.  This software is protected under the
copyright and/or trade secret laws in other countries in addition to USA.  All 
Rights Reserved.  Failure to abide by the use, disclosure and/or reproduction 
restrictions may result in civil and /or criminal penalties, and will be 
prosecuted to the maximum extent of the law.
-----------------------------------------------------------------------------*/

#include "usblink.h"
#include "top.h"

static Otg242* otg = NULL;

/*------------------------------------------------------------------------------
Name      : OTG242_base
Purpose   : 
Arguments : NONE
Return    : base address
Notes     : 
------------------------------------------------------------------------------*/

U8* OTG242_base( void )
   {
   return (U8*)otg->regBase;
   }


/*------------------------------------------------------------------------------
Name      : OTG242_Create
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
U32 OTG242_Create(volatile U8* baseAddr, U32 intNum, U32 context)
   {
   SctStatus rc;
   U32       mode;
   U32 Read;

   PRINT1(TDI242_HCD_NAME_STRING " Version: " TDI242_REVISION_STRING " (Build: "
          TDI242_BUILD_STRING ")\n\n");

   if (otg != NULL)
      {
      return 0;
      }

   otg = (Otg242 *)OS_Malloc(sizeof(Otg242));
   if (!otg)
      {
      PRINT1("Failed to allocate Otg242");
      return 0;
      }

   OS_MemSet(otg, 0, sizeof(Otg242));

   otg->osContext = context;
   otg->regBase = baseAddr;
   otg->intrNumber = intNum;

   mode = 0x100;
#ifdef OTG242_DMA_DACK_ONLY
   mode |= OTG242_MODE_DMA_DACK_ONLY;
#endif
#ifdef OTG242_DMA_DACK_ACTIVE_HIGH
   mode |= OTG242_MODE_DMA_DACK_ACTIVE_HIGH;
#endif
#ifdef OTG242_DMA_DRQ_LEVEL_SENSITIVE
   mode |= OTG242_MODE_DMA_DRQ_LEVEL_SENSITIVE;
#endif
#ifdef OTG242_DMA_EOT_ACTIVE_HIGH
   mode |= OTG242_MODE_DMA_EOT_ACTIVE_HIGH;
#endif
#if (OTG242_INTR_ACTIVE_HIGH == 1)
   mode |= OTG242_MODE_INTR_ACTIVE_HIGH;
#endif
#ifdef OTG242_VBUS_SOURCE_EXTERNAL
   mode |= OTG242_MODE_VBUS_SOURCE_EXTERNAL;
#endif

#ifdef OTG242_SRP_VBUS_PULSE
   /* mode |= OTG242_MODE_SRP_VBUS_PULSE; */
#else
   /* mode |= OTG242_MODE_SRP_DATA_PULSE; */
#endif

#ifdef OTG242_EXTERNAL_PULLUP
   mode |= OTG242_MODE_EXTERNAL_PULLUP;
#endif
#ifdef OTG242_HOST_ONLY
   mode |= OTG242_MODE_HF_HOST_ONLY;
#endif

   HW_WriteOtg242Register(otg->regBase, OTG242_MODE, mode);

#if (OTG242_NORMAL_MODE_INTR	== 1)
   Read = HW_ReadOtg242Register(otg->regBase, OTG242_IO_CONFIGURATION)
          | OTG242_IO_VBPCTRL;
   Read = Read & ~OTG242_IO_INTCTRL;
   HW_WriteOtg242Register(otg->regBase, 
                          OTG242_IO_CONFIGURATION, 
                          Read | 0x00070000
                          );
#else
   Read = 0;
#endif

   rc = OTG242HNP_Create(&otg->hnp, otg);
   if (rc == SCC_FALSE)
      {
      OS_Free(otg);
      return 0;
      }

   rc = OTG242HC_Create(&otg->hc, otg);
   if (rc == SCC_FALSE)
      {
      OS_Free(otg);
      return 0;
      }

   rc = OTG242FC_Create(&otg->fc, otg);
   if (rc == SCC_FALSE)
      {
      OS_Free(otg);
      return 0;
      }

   rc = OTG242MEM_Create(&otg->mem);
   if (rc == SCC_FALSE)
      {
      OS_Free(otg);
      return 0;
      }

   return (U32)otg;
   }

/*------------------------------------------------------------------------------
Name      : OTG242_Delete
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
void OTG242_Delete(U32 driverObject)
   {
    if (otg == NULL)
      {
      return; 
      }

   OTG242HNP_Delete(&otg->hnp);
   OTG242HC_Delete(&otg->hc);
   OTG242FC_Delete(&otg->fc);
   OTG242MEM_Delete(&otg->mem);

   OS_UnhookPCIInterruptVector(otg->intrNumber);

   OS_Free(otg);

   otg = NULL;
   }

/*------------------------------------------------------------------------------
Name      : OTG242_Initialize
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
SctStatus OTG242_Initialize(U32 driverObject)
   {
   SctStatus   rc;

   if (otg == NULL)
     {
     return SCS_ERROR; 
     }

   if(!otg->regBase)
     {
     return SCS_ERROR;
     }

   rc = OTG242HNP_Initialize(&otg->hnp);
   if (rc == SCC_FALSE)
      {
      return SCS_ERROR;
      }

   rc = OTG242HC_Initialize(&otg->hc);
   if (rc == SCC_FALSE)
      {
      return SCS_ERROR;
      }

   rc = OTG242FC_Initialize(&otg->fc);
   if (rc == SCC_FALSE)
      {
      return SCS_ERROR;
      }

   rc = OTG242MEM_Initialize(&otg->mem);
   if (rc == SCC_FALSE)
      {
      return SCS_ERROR;
      }

   otg->isInISR = SCC_FALSE;

#ifndef HW_EARLY_INTERRUPT_NOT_SAFE
   OTG242_InterruptEnable( (U32)otg );
#endif

   return SCS_SUCCESS;
   }

/*------------------------------------------------------------------------------
Name      : OTG242_InterruptEnable
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
SctStatus OTG242_InterruptEnable(U32 driverObject)
   {
   /***********************************************************
      Enable top level controller interrupt
   ***********************************************************/
   otg->intrEnable = HW_ReadOtg242Register(otg->regBase, OTG242_INTR_ENABLE);
#ifdef OTG242_HOST_ONLY
   otg->intrEnable = OTG242_INTR_HC;
#else
   otg->intrEnable |=
      OTG242_INTR_FC |
      OTG242_INTR_HC |
      OTG242_INTR_ID_ISA |
      OTG242_INTR_DM_SRP |
      OTG242_INTR_DP_SRP |
      OTG242_INTR_VBUS_SRP |
      OTG242_INTR_VBUS_ERR |
      OTG242_INTR_MASTER_STATE |
      OTG242_INTR_SLAVE_STATE;
#endif

   HW_WriteOtg242Register(otg->regBase, OTG242_INTR_ENABLE, otg->intrEnable);
   
   return SCS_SUCCESS;
   }
      
/*------------------------------------------------------------------------------
Name      : OS_INTERRUPT_HANDLER_PROTOTYPE
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
OS_INTERRUPT_HANDLER_PROTOTYPE(OTG242_IntrHandler)
   {
   U32 status;
   U32 intrEnable;
   U32 intrStatus;

   if (otg == NULL)
      {
      return; 
      }
   

   OS_ENTER_ISR()
   
   otg->isInISR = SCC_TRUE;

   /* read status first or will be clear by the disable interrupt */
   status = HW_ReadOtg242Register(otg->regBase, OTG242_INTR_STATUS);

   HW_WriteOtg242Register(otg->regBase, OTG242_INTR_ENABLE, 0);

   HW_WriteOtg242Register(otg->regBase, OTG242_INTR_STATUS,
      status & ~(OTG242_INTR_STATUS_FC | OTG242_INTR_STATUS_HC));


   otg->intrStatus |= status & otg->intrEnable;

   if (otg->intrStatus & ~OTG242_INTR_STATUS_FC & ~OTG242_INTR_STATUS_HC)
      {
      OTG242HNP_IntrHandler(&otg->hnp, status);
      otg->intrStatus &= OTG242_INTR_STATUS_FC | OTG242_INTR_STATUS_HC;
      }

   if (otg->intrStatus & OTG242_INTR_STATUS_HC)
      {
      OTG242HC_IntrHandler(&otg->hc);
      otg->intrStatus &= ~OTG242_INTR_STATUS_HC;
      }

   if (otg->intrStatus & OTG242_INTR_STATUS_FC)
      {
      OTG242FC_IntrHandler(&otg->fc);
      otg->intrStatus &= ~OTG242_INTR_STATUS_FC;
      }


   intrStatus = OTG242_GetHcIntrStatus(otg);
   intrEnable = OTG242_GetHcIntrEnable(otg);

   if (intrStatus & intrEnable)
      {
      TriggerOhciInterrupt(otg->osContext);
      }


   HW_WriteOtg242Register(otg->regBase, OTG242_INTR_ENABLE, otg->intrEnable);

   otg->isInISR = SCC_FALSE;

   OS_EXIT_ISR()
   }

/*------------------------------------------------------------------------------
Name      : OTG242_Start
Purpose   : 
Arguments : 
Return    : 
Notes     : 
------------------------------------------------------------------------------*/
SctStatus OTG242_Start(U32 driverObject)
   {
   Otg242 *otg;

   otg = (Otg242*)driverObject;

#if HW_BRIDGE_PCI
   OS_HookPCIInterruptVector(otg->intrNumber, OTG242_IntrHandler);
#else
   OS_HookNonPCIInterruptVector(otg->intrNumber, OTG242_IntrHandler);
#endif
   return SCS_SUCCESS;
   }