📄 collection.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 05 15:37:37 2006 " "Info: Processing started: Wed Apr 05 15:37:37 2006" { } { } 0} } { } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off collection -c collection " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off collection -c collection" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "color_interpolation.v 1 1 " "Info: Found 1 design units and 1 entities in source file color_interpolation.v" { { "Info" "ISGN_ENTITY_NAME" "1 color_interpolation " "Info: Found entity 1: color_interpolation" { } { { "E:/毕业设计/collection/color_interpolation.v" "color_interpolation" "" { Text "E:/毕业设计/collection/color_interpolation.v" 3 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "collection.bdf 1 1 " "Info: Found 1 design units and 1 entities in source file collection.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 collection " "Info: Found entity 1: collection" { } { { "E:/毕业设计/collection/collection.bdf" "collection" "" { Schematic "E:/毕业设计/collection/collection.bdf" { } } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "collection_buffer.v 1 1 " "Info: Found 1 design units and 1 entities in source file collection_buffer.v" { { "Info" "ISGN_ENTITY_NAME" "1 collection_buffer " "Info: Found entity 1: collection_buffer" { } { { "E:/毕业设计/collection/collection_buffer.v" "collection_buffer" "" { Text "E:/毕业设计/collection/collection_buffer.v" 2 -1 0 } } } 0} } { } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 color_interpolation.v(32) " "Warning: Verilog HDL expression warning at color_interpolation.v(32): truncated operand with size 32 to match size of smaller operand (7)" { } { { "E:/毕业设计/collection/color_interpolation.v" "" "" { Text "E:/毕业设计/collection/color_interpolation.v" 32 0 0 } } } 0}
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