xioreg.h

用于TM1300/PNX1300系列DSP（主要用于视频处理）的设备库的源码

/*
 * Copyright (c) 1999 by TriMedia Technologies. 
 *
 * +------------------------------------------------------------------+
 * | This software is furnished under a license and may only be used  |
 * | and copied in accordance with the terms and conditions of  such  |
 * | a license and with the inclusion of this copyright notice. This  |
 * | software or any other copies of this software may not be provided|
 * | or otherwise made available to any other person.  The ownership  |
 * | and title of this software is not transferred.                   |
 * |                                                                  |
 * | The information in this software is subject  to change without   |
 * | any  prior notice and should not be construed as a commitment by |
 * | TriMedia Technologies.                                           |
 * |                                                                  |
 * | this code and information is provided "as is" without any        |
 * | warranty of any kind, either expressed or implied, including but |
 * | not limited to the implied warranties of merchantability and/or  |
 * | fitness for any particular purpose.                              |
 * +------------------------------------------------------------------+
 *
 *  Module name              : xioReg.h    1.3
 *
 *  Last update              : 18:43:52 - 00/11/09
 *
 *
 */

#ifndef _XIOREG_H
#define _XIOREG_H

#include <tm1/tmBoard.h>
#include <tm1/tmLibdevErr.h>
#include <tm1/mmio.h>

/*****************************************************************************
 * Ideally, this PCI stuff belongs in tmPCI.h, but that's in the TCS workspace...
 * This stuff allows PCI accesses to be off except when XIO is actually in use. 
 */

#define PCI_DC_LOCK_MASK     0x03
#define PCI_DC_LOCK_SHIFT    0x05
#define PCI_DC_LOCK          (PCI_DC_LOCK_MASK << PCI_DC_LOCK_SHIFT)

#define PCI_DC_LOCK_CTL_HEN 0x0 /* HOLE ENABLE + PCI_ENABLE */
#define PCI_DC_LOCK_CTL_HDS 0x1 /* HOLE DISABLE + PCI_ENABLE */
#define PCI_DC_LOCK_CTL_PDS 0x2 /* HOLE DISABLE + PCI DISABLE */
#define PCI_DC_LOCK_CTL_RES 0x3 /* RESERVED */

#define  pciSetDC_LOCK(x)    ( MMIO(DC_LOCK_CTL) = \
(MMIO(DC_LOCK_CTL) & ~PCI_DC_LOCK) | ((x & PCI_DC_LOCK_MASK) << PCI_DC_LOCK_SHIFT) )

#define  pciExtractDC_LOCK() \
((MMIO(DC_LOCK_CTL) >> PCI_DC_LOCK_SHIFT) & PCI_DC_LOCK_MASK) 


/*****************************************************************************
 * The XIO functions are designed to enable PCI access only when XIO 
 *  is actually in use. This is protection against speculative loads.
 * The code saves and restores the pre-existing state.
 * To complete the protection, do this in your boardInit function:
 *
 *  pciSetDC_LOCK(PCI_DC_LOCK_CTL_PDS);
 */

#if	defined(__cplusplus)
extern	"C"	{
#endif	/* defined(__cplusplus) */

/*------------------------------------ Defines ---------------------------------------*/

/*------------------------------------- Types ----------------------------------------*/
typedef tmLibdevErr_t (*bankSwitchFunc_t)(UInt32 bank);

typedef struct xioRegParam
{
    UInt32             bank;
    bankSwitchFunc_t   bankSwitchFunc;
    UInt32           * baseAddress;
    UInt32             numWriteRegs;
    UInt8            * defaultValues;
} xioRegParam_t, *pxioRegParam_t;

/*------------------------------------ Functions ---------------------------------------*/
tmLibdevErr_t xioRegInit(pxioRegParam_t p);
tmLibdevErr_t xioRegWriteBit(UInt32 address, UInt8 mask, Bool setBit);
tmLibdevErr_t xioRegWriteByte(UInt32 address, UInt8 data);
tmLibdevErr_t xioRegReadByte(UInt32 address, UInt8 * data);

unsigned char xioSimpleRead ( volatile UInt32 Addr);
void xioSimpleWrite ( volatile UInt32 Addr, volatile UInt8 Data );

#if	defined(__cplusplus)
}
#endif	/* defined(__cplusplus) */

#endif /* _XIOREG_H */