6ch.c

用于TM1300/PNX1300系列DSP（主要用于视频处理）的设备库的源码

/*
 * Copyright (c) 1995,1996,1997 by TriMedia Technologies. 
 *
 * +------------------------------------------------------------------+
 * | This software is furnished under a license and may only be used  |
 * | and copied in accordance with the terms and conditions of  such  |
 * | a license and with the inclusion of this copyright notice. This  |
 * | software or any other copies of this software may not be provided|
 * | or otherwise made available to any other person.  The ownership  |
 * | and title of this software is not transferred.                   |
 * |                                                                  |
 * | The information in this software is subject  to change without   |
 * | any  prior notice and should not be construed as a commitment by |
 * | TriMedia Technologies.                                           |
 * |                                                                  |
 * | this code and information is provided "as is" without any        |
 * | warranty of any kind, either expressed or implied, including but |
 * | not limited to the implied warranties of merchantability and/or  |
 * | fitness for any particular purpose.                              |
 * +------------------------------------------------------------------+
 *
 *  Module name              : 6ch.c  1.41       
 *
 *  Last update              : 18:43:39 - 00/11/09 
 *
 *  Description              :
 *
 *  Initialize and control routines for TM1 IREF 6 channel audio DAC.
 *  Designed to be called from TM Device Library's board support package
 *
 *  Revision                 :
 *      Built for the TCS 1.1 release
 *
 *
 */


/* TriMedia standard shared includes */
#include <tmlib/dprintf.h>
#include <ops/custom_defs.h>
#include <tmlib/tmtypes.h>
#include <tm1/tmProcessor.h>
#include <tm1/tmInterrupts.h>
#include <tm1/mmio.h>
#include <tm1/tmLibdevErr.h>
#include <tm1/tmBoard.h>
#include <tm1/tmAOmmio.h>

#include "6ch.h"


#define     TIMEOUT_VAL     2000000

/* statics */


/*********************** *******************************/
static volatile unsigned int ch6Count = 0;

static void ch6ISR(void)
{
#pragma TCS_handler
    ++ch6Count;
    aoAckACK_UDR();
    aoAckACK_HBE();
    aoAckACK2();
    aoAckACK1();
    return;
}

/**********************************************************************/
extern tmLibdevErr_t ch6_init(boardAOParam_t * param)
{
    Int                 i, count;
    Int                 b[1024];
    Int                 *ob1, *ob2, *ob3, *ib;
    UInt                iicd;
    UInt                timeout;
    intInstanceSetup_t  setup;
    Bool                need_intclose;
    Int                 rval;

    /*
     * Use I2C control register to shut down 1847 and place AC3 DAC in
     * standby
     */
    rval = iicReadReg(TM_IREF_IIC_EXPANDER_ADDRESS, -1, &iicd);
    if (rval)
    {
        goto timeout_error;
    }

    iicd &= 0x8D;        /* 10001101, raise Standby, lower master,
                          * chmode, pwrdown, ac3init */
    iicd |= 0x86;        /* raise standby and ac3mode and ac3init */
    rval = iicWriteReg(TM_IREF_IIC_EXPANDER_ADDRESS, -1, iicd);
    if (rval)
    {
        goto timeout_error;
    }
    microsleep(360);    /* let it power down */

    ib = (int *) (((int) b + 63) & 0xFFFFFFC0);    /* cache align ib */
    ob1 = &ib[192];
    ob2 = &ib[384];
    ob3 = &ob2[192];

    for (i = 0; i < 192; i++)
    {
        ob1[i] = ob2[i] = 0;
        ob3[i] = 0xFFFFFFFF;
    }
    _cache_copyback(ob1, 192*sizeof(Int));
    _cache_copyback(ob2, 192*sizeof(Int));
    _cache_copyback(ob3, 192*sizeof(Int));

/******* OUTPUT Setup: Initialize to 6 ch, 96 clocks. *******/

    MMIO(AO_BASE1) = (unsigned int) ob1;
    MMIO(AO_BASE2) = (unsigned int) ob2;
    MMIO(AO_SIZE) = 192;

    /* set up dummy interrupt handler to keep data flowing */
    need_intclose = (intOpen(intINT_12) != INT_ERR_ALREADY_OPEN);
    setup.enabled           = True;
    setup.handler           = ch6ISR;
    setup.priority          = intPRIO_3;
    setup.level_triggered   = True;
    intInstanceSetup(intINT_12, &setup);
    
    ch6Count = 0;
    aoEnableTRANS_ENABLE();

    /*
     * IREF config sequence: Data is passed thru PLD to DACs.  start all
     * clocks (96 SCKS per WS). wait 2k L/R clocks Make data high To
     * trigger init, assert AC3_INIT (low) Wait at least 8 L/R clocks
     * bring AC_INIT high.
     */

    microsleep(2);        /* delay for 2usec coming out of reset */

    iicd &= 0x7F;        /* lower Standby */
    rval = iicWriteReg(TM_IREF_IIC_EXPANDER_ADDRESS, -1, iicd);
    if (rval)
    {
        goto timeout_error;
    }

    /* output 1024+64 zeros (counting stereo pairs) */

    /*
     * NOTE: This is new with the point release. In the past, no ISR was
     * used and the aoAck's here did the trick. Because audio was not
     * starting, I was forced to add the ISR. Now the aoAck's here are
     * redundant, but...
     */
    for (count = 0; count < 8; count++) {    
        /* 8 buffer pairs make 1024 samples */
        for (timeout = 0; aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
            /* 1 is running */
            microsleep(200);
            if (++timeout > TIMEOUT_VAL)
            {
                rval = AIO_ERR_TIMEOUT7;
                goto timeout_error;
            }
        }
        aoAckACK1();
        for (timeout = 0; !aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
            /* 2 is running */
            microsleep(200);
            if (++timeout > TIMEOUT_VAL)
            {
                rval = AIO_ERR_TIMEOUT7;
                goto timeout_error;
            }
        }
        aoAckACK2();
    }

    /* To raise data line, swap in buffer 3 which has ones in it */
    MMIO(AO_BASE2) = (unsigned int) ob3;
    for (timeout = 0; aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
        /* 1 is running : more  zeros */
        microsleep(200);
        if (++timeout > TIMEOUT_VAL)
        {
            rval = AIO_ERR_TIMEOUT7;
            goto timeout_error;
        }
    }
    aoAckACK1();

    /* data goes high here: 2 is running */
    MMIO(AO_BASE1) = (unsigned int) ob3;    /* keep ones coming */
    iicd &= ~2;                             /* raise ac3init */
    rval = iicWriteReg(TM_IREF_IIC_EXPANDER_ADDRESS, -1, iicd);
    if (rval)
    {
        goto timeout_error;
    }

    for (timeout = 0; !aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
        /* 2 is running, data is  high */
        microsleep(200);
        if (++timeout > TIMEOUT_VAL)
        {
            rval = AIO_ERR_TIMEOUT7;
            goto timeout_error;
        }
    }
    aoAckACK2();

    /* 1 is running */
    iicd |= 2;        /* raise ac3init */
    rval = iicWriteReg(TM_IREF_IIC_EXPANDER_ADDRESS, -1, iicd);
    if (rval)
    {
        goto timeout_error;
    }

    MMIO(AO_BASE2) = (unsigned int) ob1;
    for (timeout = 0; aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
        /* 1 is running, data is high */
        microsleep(200);
        if (++timeout > TIMEOUT_VAL)
        {
            rval = AIO_ERR_TIMEOUT7;
            goto timeout_error;
        }
    }
    aoAckACK1();

    MMIO(AO_BASE1) = (unsigned int) ob2;    /* 2 is running: data is low
                                             * again */
    for (timeout = 0; !aoBUF1_ACTIVE(MMIO(AO_STATUS));) {    
        /* wait through first 64  high data samples */
        microsleep(200);
        if (++timeout > TIMEOUT_VAL)
        {
            rval = AIO_ERR_TIMEOUT7;
            goto timeout_error;
        }
    }
    aoAckACK2();

    /* This will cause the DACs to power down, but not lose config. */
    aoDisableTRANS_ENABLE();
    
    /* don't leave those dummy values in the MMIO registers */
    MMIO(AO_BASE1) = 0;
    MMIO(AO_BASE2) = 0;
    MMIO(AO_SIZE) = 0;
    
    if (need_intclose)
        intClose(intINT_12);


    return (TMLIBDEV_OK);

timeout_error:
    aoRESET();
    if (need_intclose)
        intClose(intINT_12);
    return rval;

}                /* end of ch6_init() */


extern void 
ch6_term(void)
{
    aoRESET();
}