📄 tmhdvo.c
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*/
rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023,
HDVO_NUMBER_MDX_PARAMETERS,
HDVO_8_Bit);
tmAssert(rval == TMLIBDEV_OK, rval);
if (rval != TMLIBDEV_OK)
return rval;
/*
* Transfer parameters from control crossbar memory to MDX
*/
/*
* setup crossbar out module :
* connect xbar 22 (MDX to memory module 023)
*/
hdvoSetupCtrlOutXbar(23, 22);
/*
* setup memory module
* read is enabled, control is 00 (reset address reg and use page
* specified), page is 0, Keep_Page_Read is zero (allow page
* incrementing).
*/
rval = hdvoSetupMemory(HDVO_SRAM023, HDVO_MEMORY_MODULE_READ, 0,
0, False, HDVO_MEMORY_BLOCK_RESET_ADDRESS);
tmAssert(rval == TMLIBDEV_OK, rval);
if (rval != TMLIBDEV_OK)
return rval;
/* Put MDX into Load coefficients mode, enable it, do the transfer then
* disable
*/
hdvoSetMDX_MODE_Mode(mmioValue, HDVO_MDX_CONTROL);
hdvoEnableMDX_MODE_Enable(mmioValue);
MMIO(HDVO_MDX_MODE) = mmioValue;
hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
mmioValue = 0;
hdvoSetMDX_MODE_Mode(mmioValue, HDVO_MDX_DATA);
hdvoDisableMDX_MODE_Enable(mmioValue);
MMIO(HDVO_MDX_MODE) = mmioValue;
hdvoDisableMemory(HDVO_SRAM023, HDVO_MEMORY_MODULE_READ);
return (TMLIBDEV_OK);
}
/*****************************************************************************/
/*
* Function : hdvoReset
* Reset the HDVO and the MCP
* This is an internal function.
*
* Parameters : None
*
* Function Result: Return TMLIBDEV_OK on success.
*/
static tmLibdevErr_t
hdvoReset(void)
{
/*
* First set the Reset_HDVO and Reset_MCP bits of the MCP_CTRL register,
* whilst setting the remaining bits to zero. Then we must clear the
* Reset_HDVO bit; the Reset_MCP will automatically clear itself.
*/
hdvoAckMCP_CTRL_Reset_All();
hdvoDisableMCP_CTRL_Reset_HDVO();
return (TMLIBDEV_OK);
}
/*****************************************************************************/
/*
* Function : hdvoIssueProcessingStep
* Issues an HDVO processing step.
* This is an internal function.
*
* Parameters : Mode - specifies either sychronous or asynchronous return.
*
* Function Result: Return TMLIBDEV_OK on success.
*/
static tmLibdevErr_t
hdvoIssueProcessingStep(hdvoIssuePS_t mode)
{
hdvoAckMCP_CTL2_End_Load_Start();
/*
* If we have a synchronous request then we must wait until the end of op
* flag is set.
*/
if (mode == HDVO_SYNCHRONOUS_ISSUE) {
while(!hdvoCheckMCP_STAT1_Status_End_Load_Start()) {
/* Spin waiting for End_Load_Start to be set */
}
}
return TMLIBDEV_OK;
}
/*****************************************************************************/
/*
* Function : hdvoSetupMemory
* Sets up the control registers of a memory module
*
* This is an internal function.
*
* Parameters : module - memory module to program
* readWrite - Specifies whether to program the read or write
* registers; use:
* HDVO_MEMORY_MODULE_READ or
* HDVO_MEMORY_MODULE_WRITE
* page - memory module page (0-4)
* startAddress - start address in page
* keepPage - When false, the page number is automatically
* incremented when the address counter goes from
* 255 to 0. When true, the page stays the same.
* control - One of four modes:
*
*
* Function Result: Return TMLIBDEV_OK on success.
* HDVO_ERR_INVALID_MEMORY_PAGE invalid memory page specified
* HDVO_ERR_INVALID_MEMORY_CONTROL_MODE invalid memory
* control mode.
*/
static tmLibdevErr_t
hdvoSetupMemory(UInt32 module, hdvoMEMORY_RW_t readWrite, UInt8 page,
UInt8 startAddress, Bool keepPage,
hdvoMemoryBlockCtrl_t control)
{
UInt32 mmioValue = 0;
tmAssert((page < 5), HDVO_ERR_INVALID_MEMORY_PAGE);
tmAssert((control < 4), HDVO_ERR_INVALID_MEMORY_CONTROL_MODE);
if (readWrite == HDVO_MEMORY_MODULE_READ) {
/*
* setup the MEM_START_READ register, specifying the start address in the
* page.
*/
hdvoSetMEM_START_READ(mmioValue, startAddress);
MMIO(module + HDVO_MEM_START_READ) = mmioValue;
/*
* Setup the control parameters
*/
mmioValue = 0;
hdvoEnableMEM_CTRL_READ_Enable_Read(mmioValue);
hdvoSetMEM_CTRL_READ_Ctrl_Read(mmioValue, control);
hdvoSetMEM_CTRL_READ_Page_Read(mmioValue, page);
if (keepPage)
hdvoEnableMEM_CTRL_Keep_Page_Read(mmioValue);
else
hdvoDisableMEM_CTRL_Keep_Page_Read(mmioValue);
MMIO(module + HDVO_MEM_CTRL_READ) = mmioValue;
}
else {
/*
* setup the MEM_START_WRITE register, specifying the start address in the
* page.
*/
hdvoSetMEM_START_WRITE(mmioValue, startAddress);
MMIO(module + HDVO_MEM_START_WRITE) = mmioValue;
/*
* Setup the control parameters
*/
mmioValue = 0;
hdvoEnableMEM_CTRL_WRITE_Enable_Write(mmioValue);
hdvoSetMEM_CTRL_WRITE_Ctrl_Write(mmioValue, control);
hdvoSetMEM_CTRL_WRITE_Page_Write(mmioValue, page);
if (keepPage)
hdvoEnableMEM_CTRL_Keep_Page_Write(mmioValue);
else
hdvoDisableMEM_CTRL_Keep_Page_Write(mmioValue);
MMIO(module + HDVO_MEM_CTRL_WRITE) = mmioValue;
}
return TMLIBDEV_OK;
}
/*****************************************************************************/
/*
* Function : hdvoDisableMemory
* Disables a memory module
*
* This is an internal function.
*
* Parameters : module - memory module to program
* readWrite - Specifies whether to disable the read or write
* registers; use:
* HDVO_MEMORY_MODULE_READ or
* HDVO_MEMORY_MODULE_WRITE
*
* Function Result: Return TMLIBDEV_OK on success.
*/
static tmLibdevErr_t
hdvoDisableMemory(UInt32 module, hdvoMEMORY_RW_t readWrite)
{
UInt32 mmioValue = 0;
if (readWrite == HDVO_MEMORY_MODULE_READ) {
hdvoDisableMEM_CTRL_READ_Enable_Read(mmioValue);
MMIO(module + HDVO_MEM_CTRL_READ) = mmioValue;
}
else {
hdvoDisableMEM_CTRL_WRITE_Enable_Write(mmioValue);
MMIO(module + HDVO_MEM_CTRL_WRITE) = mmioValue;
}
return TMLIBDEV_OK;
}
/*****************************************************************************/
/*
* Function : hdvoSetupCtrlInXbar
* Sets up the control registers of an Ctrl Input crossbar
*
* This is an internal function.
*
* Parameters : functionUnitPort - Function unit port
* memoryModule - specifies memory module input to connect to.
* Note that there the control crossbar is made
* up of two 12x12 muxes. This function
* specifies an input from 0-23, and dtermines
* the correct mux to program based on this.
*
* Function Result: Return TMLIBDEV_OK on success.
* HDVO_ERR_INVALID_XBAR_MUX_INPUT invalid mux input
* HDVO_ERR_INVALID_XBAR_MUX_OUTPUT invalid mux output
*/
static tmLibdevErr_t
hdvoSetupCtrlInXbar( UInt8 functionUnitPort,
UInt8 memoryModule)
{
UInt32 mmioValue = 0;
tmAssert((functionUnitPort < 12), HDVO_ERR_INVALID_XBAR_MUX_INPUT);
tmAssert((memoryModule < 24), HDVO_ERR_INVALID_XBAR_MUX_OUTPUT);
switch(memoryModule) {
/* First 12x12 mux */
case 0:
hdvoSetIN_XBAR_sel_ctrl_0(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_10) = mmioValue;
break;
case 1:
hdvoSetIN_XBAR_sel_ctrl_1(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_10) = mmioValue;
break;
case 2:
hdvoSetIN_XBAR_sel_ctrl_2(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_32) = mmioValue;
break;
case 3:
hdvoSetIN_XBAR_sel_ctrl_3(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_32) = mmioValue;
break;
case 4:
hdvoSetIN_XBAR_sel_ctrl_4(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_54) = mmioValue;
break;
case 5:
hdvoSetIN_XBAR_sel_ctrl_5(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_54) = mmioValue;
break;
case 6:
hdvoSetIN_XBAR_sel_ctrl_6(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_76) = mmioValue;
break;
case 7:
hdvoSetIN_XBAR_sel_ctrl_7(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_76) = mmioValue;
break;
case 8:
hdvoSetIN_XBAR_sel_ctrl_8(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_98) = mmioValue;
break;
case 9:
hdvoSetIN_XBAR_sel_ctrl_9(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_98) = mmioValue;
break;
case 10:
hdvoSetIN_XBAR_sel_ctrl_10(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1110) = mmioValue;
break;
case 11:
hdvoSetIN_XBAR_sel_ctrl_11(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1110) = mmioValue;
break;
/* Second 12x12 mux */
case 12:
hdvoSetIN_XBAR_sel_ctrl_0(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1312) = mmioValue;
break;
case 13:
hdvoSetIN_XBAR_sel_ctrl_1(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1312) = mmioValue;
break;
case 14:
hdvoSetIN_XBAR_sel_ctrl_2(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1514) = mmioValue;
break;
case 15:
hdvoSetIN_XBAR_sel_ctrl_3(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1514) = mmioValue;
break;
case 16:
hdvoSetIN_XBAR_sel_ctrl_4(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1716) = mmioValue;
break;
case 17:
hdvoSetIN_XBAR_sel_ctrl_5(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1716) = mmioValue;
break;
case 18:
hdvoSetIN_XBAR_sel_ctrl_6(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1918) = mmioValue;
break;
case 19:
hdvoSetIN_XBAR_sel_ctrl_7(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_1918) = mmioValue;
break;
case 20:
hdvoSetIN_XBAR_sel_ctrl_8(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_2120) = mmioValue;
break;
case 21:
hdvoSetIN_XBAR_sel_ctrl_9(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_2120) = mmioValue;
break;
case 22:
hdvoSetIN_XBAR_sel_ctrl_10(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_2322) = mmioValue;
break;
case 23:
hdvoSetIN_XBAR_sel_ctrl_11(mmioValue, functionUnitPort);
MMIO(HDVO_XBIN_CTRL_SEL_CTRL_2322) = mmioValue;
break;
default:
tmAssert(False, HDVO_ERR_INVALID_XBAR_MUX_OUTPUT);
return HDVO_ERR_INVALID_XBAR_MUX_OUTPUT;
}
return TMLIBDEV_OK;
}
/*****************************************************************************/
/*
* Function : hdvoSetupCtrlOutXbar
* Sets up the control registers of an Ctrl Output crossbar
*
* This is an internal function.
*
* Parameters : memoryModule - input memory module (0-23)
* functionUnitPort - specifies function unit to connect to.
* Note that there the crossbar is made up of
* two 24x12 muxes. This function specifies
* an output from 0-23, and determines the
* correct mux to program based on this.
*
* Function Result: Return TMLIBDEV_OK on success.
* HDVO_ERR_INVALID_XBAR_MUX_INPUT invalid mux input
* HDVO_ERR_INVALID_XBAR_MUX_OUTPUT invalid mux output
*/
static tmLibdevErr_t
hdvoSetupCtrlOutXbar(UInt8 memoryModule, UInt8 functionUnitPort)
{
UInt32 mmioValue = 0;
tmAssert((memoryModule < 24), HDVO_ERR_INVALID_XBAR_MUX_INPUT);
tmAssert((functionUnitPort < 24), HDVO_ERR_INVALID_XBAR_MUX_OUTPUT);
switch(func
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