tmhdvo.c

用于TM1300/PNX1300系列DSP（主要用于视频处理）的设备库的源码

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM021, 1024,
				  HDVO_8_Bit);
    
    /*
     * now transfer the 1k instructions from ctrl crossbar to mcp program
     * memory. Increment the mcp pgm page by 4 (4x256 instructions).
     */
    rval = hdvoTransferCTRLtoMCPProgram(HDVO_SRAM023,
					HDVO_SRAM022,
					HDVO_SRAM021,
					mcpPGMPage,
					1024);
    mcpPGMPage+=4;
  }

  if (remainingInstructions) {
#ifdef DEBUG
    printf("transferring remaining instructions = %d\n",remainingInstructions);
#endif
    /*
     * transfer remaining of b0 and b1 to IRAM, then transfer them to control
     * crossbar memory module 23 and 22 respectively.
     */
    if (!doneInitialTransfer) {
      rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			      microCode, True, 0,
			      remainingInstructions*2, HDVO_DMA_HWY_NO_SWAP);
      doneInitialTransfer = True;
    }
    else {
      rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, False, 0, True, 0, 
			       remainingInstructions*2, HDVO_DMA_HWY_NO_SWAP);
    }
    
    /* 
     * Toggle the IRAM so that the Xbus can access the data
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 
				  remainingInstructions, HDVO_8_Bit);
    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, remainingInstructions,
				  HDVO_SRAM022, remainingInstructions,
				  HDVO_8_Bit);

    /* 
     * transfer remaining instructions of b2 to IRAM then transfer it to
     * control crossbar memory module 21.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, False, 0, True, 0,
			     remainingInstructions, HDVO_DMA_HWY_NO_SWAP);

    /* 
     * Toggle the IRAM so that the Xbus can access the data
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM021,
				  remainingInstructions, HDVO_8_Bit);
    
    /*
     * now transfer the remaining instructions from ctrl crossbar to mcp
     * program memory. Increment the mcp pgm page by 4 (4x256 instructions).
     */

    rval = hdvoTransferCTRLtoMCPProgram(HDVO_SRAM023,
					HDVO_SRAM022,
					HDVO_SRAM021,
					mcpPGMPage,
					remainingInstructions);
  }

  return (TMLIBDEV_OK);
}

#else /* non-formatted microcode */
static tmLibdevErr_t
hdvoLoadMicroCode(UInt8 * microCode0, UInt8 * microCode1,
		  UInt8 * microCode2, UInt16  microCodeSize)
{
  Int     i;
  UInt32  number1024InstructionTransfers;
  UInt32  remainingInstructions;
  UInt8   mcpPGMPage = 0;
  tmLibdevErr_t rval;

  tmAssert(microCode0, TMLIBDEV_ERR_NULL_PARAMETER);
  tmAssert(microCode1, TMLIBDEV_ERR_NULL_PARAMETER);
  tmAssert(microCode2, TMLIBDEV_ERR_NULL_PARAMETER);

  /*
   * Check the Microcode:
   * 1. Check that the size is not zero.
   * 2. Check that the size fits into internal mcp program memory.
   * 3. Check microcode is aligned on a 16 byte boundary.
   */
 if (!microCodeSize) {
    tmAssert(microCodeSize, HDVO_ERR_ZERO_MICROCODE_SIZE);
    return HDVO_ERR_ZERO_MICROCODE_SIZE;
  }
  else if (microCodeSize > HDVO_MAX_MICROCODE_SIZE) {
    tmAssert(microCodeSize <= HDVO_MAX_MICROCODE_SIZE,
	     HDVO_ERR_MICROCODE_SIZE_TOO_BIG);
    return HDVO_ERR_MICROCODE_SIZE_TOO_BIG;
  }

  if ((((UInt32) microCode0) & 0x0f)
      || (((UInt32) microCode1) & 0x0f)
      || (((UInt32) microCode2) & 0x0f)) {
    tmAssert(!(((UInt32) microCode0) & 0x0f), HDVO_ERR_MICROCODE_NOT_ALIGNED);
    tmAssert(!(((UInt32) microCode1) & 0x0f), HDVO_ERR_MICROCODE_NOT_ALIGNED);
    tmAssert(!(((UInt32) microCode2) & 0x0f), HDVO_ERR_MICROCODE_NOT_ALIGNED);
    return HDVO_ERR_MICROCODE_NOT_ALIGNED;
  }

  /*
   * Copyback the microcode and then load it into the MCP
   */
  _cache_copyback(microCode0, microCodeSize);
  _cache_copyback(microCode1, microCodeSize);
  _cache_copyback(microCode2, microCodeSize);

  /*
   * Calculate how many transfers we need to do from SDRAM to MCP program
   * memory. We transfer in 1024 instruction sections.
   */
  number1024InstructionTransfers = microCodeSize/1024;
  remainingInstructions = microCodeSize%1024;

  /*
   * If we have at least 1024 instructions then we use a loop which
   * down loads 1k instructions at a time. We transfer 1k of each individual
   * instruction block from SDRAM to Control crossbar memory. As we have three
   * pointers all using the global context we must keep track of the buffer
   * pointer addresses.
   */
  for (i = 0; i < number1024InstructionTransfers; i++) {
#ifdef DEBUG
    printf("Transferring 1024 instructions\n");
#endif
    /*
     * transfer 1k of b0 to IRAM, then transfer to control crossbar memory
     * module 23.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			     microCode0, True, 0, 1024, HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    microCode0 += 1024;

    /* 
     * Toggle the IRAM so that the Xbus can access the data.
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 1024,
				  HDVO_8_Bit);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    /*
     * transfer 1k of b1 to IRAM, then transfer to control crossbar memory
     * module 22.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			     microCode1, True, 0, 1024, 
			     HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    microCode1 += 1024;

    /* 
     * Toggle the IRAM so that the Xbus can access the data.
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM022, 1024,
				  HDVO_8_Bit);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    /* 
     * transfer 1k of b2 to IRAM then transfer it to control crossbar memory
     * module 21.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True, microCode2, True, 
			     0, 1024, HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    microCode2 += 1024;

    /* 
     * Toggle the IRAM so that the Xbus can access the data
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM021, 1024,
				  HDVO_8_Bit);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;
    
    /*
     * now transfer the 1k instructions from ctrl crossbar to mcp program
     * memory. Increment the mcp pgm page by 4 (4x256 instructions).
     */
    rval = hdvoTransferCTRLtoMCPProgram(HDVO_SRAM023,
					HDVO_SRAM022,
					HDVO_SRAM021,
					mcpPGMPage,
					1024);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    mcpPGMPage+=4;
  }

  if (remainingInstructions) {
#ifdef DEBUG
    printf("transferring remaining instructions = %d\n",remainingInstructions);
#endif
    /*
     * transfer remaining of b0 to IRAM, then transfer it to control
     * crossbar memory module 23.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			     microCode0, True, 0,
			     remainingInstructions, HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    /* 
     * Toggle the IRAM so that the Xbus can access the data
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 
				  remainingInstructions, HDVO_8_Bit);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;


    /*
     * transfer remaining of b1 to IRAM, then transfer it to control
     * crossbar memory module 22.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			     microCode1, True, 0,
			     remainingInstructions, HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    /* 
     * Toggle the IRAM so that the Xbus can access the data
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0,
				  HDVO_SRAM022, remainingInstructions,
				  HDVO_8_Bit);

    /* 
     * transfer remaining instructions of b2 to IRAM then transfer it to
     * control crossbar memory module 21.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True, 
			     microCode2, True, 0,
			     remainingInstructions, HDVO_DMA_HWY_NO_SWAP);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;

    /* 
     * Toggle the IRAM so that the Xbus can access the data
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM021,
				  remainingInstructions, HDVO_8_Bit);
    
    /*
     * now transfer the remaining instructions from ctrl crossbar to mcp
     * program memory. Increment the mcp pgm page by 4 (4x256 instructions).
     */

    rval = hdvoTransferCTRLtoMCPProgram(HDVO_SRAM023,
					HDVO_SRAM022,
					HDVO_SRAM021,
					mcpPGMPage,
					remainingInstructions);
    tmAssert(rval == TMLIBDEV_OK, rval);
    if (rval != TMLIBDEV_OK)
      return rval;
  }

  return (TMLIBDEV_OK);
}

#endif /* ifndef HDVO_UNFORMATED_UCODE */

/***************************************************************************/
/*
 * Function       : hdvoLoadMDXParameters
 *                  Loads the Matrix/De-matrix parameters
 *
 * Parameters     : Pointer to the MDX parameters
 *
 * Function Result: Return TMLIBDEV_OK on success.
 *                  HDVO_ERR_ADDRESS_NOT_ALIGNED is the parameter table is not
 *                  aligned on a 16 byte boundary.
 *
 * Precondition   : MCP should not be running.
 *
 * Postcondition  : 
 */
static tmLibdevErr_t
hdvoLoadMDXParameters(UInt8 *mdxParameters)
{
  tmLibdevErr_t rval;
  UInt32 mmioValue = 0;

  /*
   * Check the parameter table is on a 16 byte boundary.
   */
  tmAssert(mdxParameters, TMLIBDEV_ERR_NULL_PARAMETER);
  if (((UInt32) mdxParameters) & 0x0f) {
    tmAssert(!(((UInt32) mdxParameters) & 0x0f), HDVO_ERR_ADDRESS_NOT_ALIGNED);
    return HDVO_ERR_ADDRESS_NOT_ALIGNED;
  }

  /*
   * Copyback the parameters
   */
  _cache_copyback(mdxParameters, HDVO_NUMBER_MDX_PARAMETERS*sizeof(UInt8));

  /*
   * first transfer ALL the data from SDRAM to IRAM memory.
   */
  rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			   (UInt8 *)mdxParameters, True, 0, 
			   HDVO_NUMBER_MDX_PARAMETERS*sizeof(UInt8),
			   HDVO_DMA_HWY_NO_SWAP);

  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;

  /* 
   * Toggle the IRAM so that the Xbus can access the data
   * We need two load-conf/start sequences due to the shadowing of the
   * dma-hwy Load_Conf_Enable bit.
   */
  hdvoEnableDHI_CTRL_Load_Conf_Enable();
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  while(hdvoCheckDHI_HSTATUS2_HTS());
  
  /*
   * Transfer data from IRAM to control crossbar memory