tmhdvo.c

用于TM1300/PNX1300系列DSP（主要用于视频处理）的设备库的源码

   * first transfer ALL the data from SDRAM to IRAM memory.
   */
  rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			   gammaTable, True, 0, 
			   HDVO_NUMBER_STM_GAMMA_PARAMETERS,
			   HDVO_DMA_HWY_NO_SWAP);
  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;
  
  /* 
   * Toggle the IRAM so that the Xbus can access the data
   * We need two load-conf/start sequences due to the shadowing of the
   * dma-hwy Load_Conf_Enable bit.
   */
  hdvoEnableDHI_CTRL_Load_Conf_Enable();
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  while(hdvoCheckDHI_HSTATUS2_HTS());
  
  /*
   * Transfer data from IRAM to control crossbar memory
   */
  rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023,
				HDVO_NUMBER_STM_GAMMA_PARAMETERS,
				HDVO_8_Bit);
  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;
  
  /*
   * Transfer gamma table from control crossbar memory to streaming out
   */
  rval = hdvoTransferCTRLtoSTM(HDVO_STM_LOAD_LUT, HDVO_SRAM023,
			       HDVO_NUMBER_STM_GAMMA_PARAMETERS);
  tmAssert(rval == TMLIBDEV_OK, rval);

  return (rval);
}
#endif

/***************************************************************************/
/*
 * Function       : hdvoLoadSTMParameters
 *                  Loads the streaming out parameters
 *
 * Parameters     : Pointer to the STM parameters
 *
 * Function Result: Return TMLIBDEV_OK on success.
 *                  HDVO_ERR_ADDRESS_NOT_ALIGNED is the parameter table is not
 *                  aligned on a 16 byte boundary.
 *
 * Precondition   : MCP should not be running.
 *
 * Postcondition  : 
 */
#ifndef DISABLE_LOAD_STM_PARAMS
tmLibdevErr_t
#ifdef HDVO_STM16
hdvoLoadSTMParameters(UInt16 *stmParameters)
#else
hdvoLoadSTMParameters(UInt8 *stmParameters)
#endif
{
  tmLibdevErr_t rval;
  UInt32 mmioValue = 0;

  /*
   * Check the parameter table is on a 16 byte boundary.
   */
  tmAssert(stmParameters, TMLIBDEV_ERR_NULL_PARAMETER);
  if (((UInt32) stmParameters) & 0x0f) {
    tmAssert(!(((UInt32) stmParameters) & 0x0f), HDVO_ERR_ADDRESS_NOT_ALIGNED);
    return HDVO_ERR_ADDRESS_NOT_ALIGNED;
  }

  /*
   * Copyback the parameters
   */
#ifdef HDVO_STM16
  _cache_copyback(stmParameters, HDVO_NUMBER_STM_PARAMETERS*sizeof(UInt16));
#else
  _cache_copyback(stmParameters, HDVO_NUMBER_STM_PARAMETERS*sizeof(UInt8));
#endif
  /*
   * first transfer ALL the data from SDRAM to IRAM memory.
   */
#ifdef HDVO_STM16
#ifdef __LITTLE_ENDIAN__
  rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			   (UInt8 *)stmParameters, True, 0, 
			   HDVO_NUMBER_STM_PARAMETERS*sizeof(UInt16),
			   HDVO_DMA_HWY_NO_SWAP);
#else
  rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			   (UInt8 *)stmParameters, True, 0, 
			   HDVO_NUMBER_STM_PARAMETERS*sizeof(UInt16),
			   HDVO_DMA_HWY_BSH);
#endif
#else
  rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			   (UInt8 *)stmParameters, True, 0, 
			   HDVO_NUMBER_STM_PARAMETERS*sizeof(UInt8),
			   HDVO_DMA_HWY_NO_SWAP);
#endif
  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;

  /* 
   * Toggle the IRAM so that the Xbus can access the data
   * We need two load-conf/start sequences due to the shadowing of the
   * dma-hwy Load_Conf_Enable bit.
   */
  hdvoEnableDHI_CTRL_Load_Conf_Enable();
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
  while(hdvoCheckDHI_HSTATUS2_HTS());
  
  /*
   * Transfer data from IRAM to control crossbar memory
   */
#ifdef HDVO_STM16
  rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 
				HDVO_NUMBER_STM_PARAMETERS,
				HDVO_16_Bit);
#else
  rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 
				HDVO_NUMBER_STM_PARAMETERS,
				HDVO_8_Bit);
#endif

  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;
  
  /*
   * Transfer parameters from control crossbar memory to streaming out
   */
  rval = hdvoTransferCTRLtoSTM(HDVO_STM_LOAD_PARAM, HDVO_SRAM023,
			       HDVO_NUMBER_STM_PARAMETERS);
  tmAssert(rval == TMLIBDEV_OK, rval);
  if (rval != TMLIBDEV_OK)
    return rval;

#if 1
  hdvoSetSTM_CTRL_Load_Mode(mmioValue, HDVO_STM_NO_LOAD);
  hdvoEnableSTM_CTRL_Go(mmioValue);
  MMIO(HDVO_STM_CTRL) =  mmioValue;
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
#else
  /*
   * We don't Free Run just yet! We have to decide how display mode 
   * synchronises with STM so we get a clean frame when we begin rendering.
   */
  /*
   * Free run STM
   */
  hdvoSetSTM_CTRL_Load_Mode(mmioValue, HDVO_STM_FREE_RUN);
  hdvoEnableSTM_CTRL_STM_Enable(mmioValue);
  hdvoEnableSTM_CTRL_Go(mmioValue);
  MMIO(HDVO_STM_CTRL) =  mmioValue;
#ifndef DISABLE_STM
  hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
#endif
#endif

  return (TMLIBDEV_OK);
}
#endif

/***************************************************************************/
/*
 * Function       : hdvoLoadContext
 *                  Loads the context structure from SDRAM into MCP data 
 *                  memory beginning at address 768 (or 896 if HDVO_NOKERNEL)
 *
 * Parameters     : Pointer to the context structure.
 *
 * Function Result: Return TMLIBDEV_OK on success.
 *                  HDVO_ERR_ADDRESS_NOT_ALIGNED if the context is not
 *                  aligned on a 16 byte boundary.
 *                  HDVO_ERR_INVALID_CONTEXT_SIZE is the context size is not
 *                  a multiple of 128 bytes.
 *
 * Precondition   : MCP should not be running.
 *
 * Postcondition  : 
 */
static tmLibdevErr_t
hdvoLoadContext(phdvoContext_t pcontext)
{
  tmLibdevErr_t rval;

  /*
   * Check the context:
   * 1. Check context is aligned on a 16 byte boundary.
   * 2. Check context size is multiple of 128 bytes
   */
  tmAssert(pcontext, TMLIBDEV_ERR_NULL_PARAMETER);
  if (((UInt32) pcontext) & 0x0f) {
    tmAssert(!(((UInt32) pcontext) & 0x0f), HDVO_ERR_CONTEXT_NOT_ALIGNED);
    return HDVO_ERR_CONTEXT_NOT_ALIGNED;
  }
  tmAssert(!((sizeof(hdvoContext_t))%128), HDVO_ERR_INVALID_CONTEXT_SIZE);
  
  /*
   * Copyback the context structure and then load it into the MCP. The context
   * structure is stored at MCP data memory address 768 (896 NOKERNEL) onwards. This 
   * corresponds to MCP data memory page 5 (7 NOKERNEL).
   */
  _cache_copyback(pcontext, sizeof(hdvoContext_t));
#ifdef HDVO_NOKERNEL
  rval = hdvoLoadMCPDataMemory((UInt16 *) pcontext,
			       sizeof(hdvoContext_t), 7);
#else
  rval = hdvoLoadMCPDataMemory((UInt16 *) pcontext,
			       sizeof(hdvoContext_t), 5);
#endif

  return (rval);
}

/***************************************************************************/
/*
 * Function       : hdvoLoadDataSegment
 *                  Loads the data segment structure in SDRAM into MCP
 *                  data ram. Initialised data is stored from MCP data memory
 *                  address 0 onwards. 
 *
 * Parameters     : 1. Pointer to the data segment to be loaded
 *                  2. Size of the data segment
 *
 * Function Result: Return TMLIBDEV_OK on success.
 *                  HDVO_ERR_ADDRESS_NOT_ALIGNED if the data segment is not
 *                  aligned on a 16 byte boundary.
 *                  HDVO_ERR_DATA_SEGMENT_TOO_BIG if the segment size is
 *                  larger than (MCP dat memory size - context size).
 *
 * Precondition   : MCP should not be running.
 *
 * Postcondition  : 
 */
static tmLibdevErr_t
hdvoLoadDataSegment(UInt16 * dataSegment, UInt16 dataSegmentSize)
{
  tmLibdevErr_t rval;

  /*
   * Check the dataSegment:
   * 1. Check dataSegment is aligned on a 16 byte boundary.
   * 2. Check dataSegment size is less than total data size - context size
   */
  tmAssert(dataSegment, TMLIBDEV_ERR_NULL_PARAMETER);
  if (((UInt32) dataSegment) & 0x0f) {
    tmAssert(!(((UInt32) dataSegment) & 0x0f),
	     HDVO_ERR_DATA_SEGMENT_NOT_ALIGNED);
    return HDVO_ERR_DATA_SEGMENT_NOT_ALIGNED;
  }
  tmAssert(dataSegmentSize <= HDVO_MAX_DATA_SIZE,
	   HDVO_ERR_DATA_SEGMENT_TOO_BIG);
  if (dataSegmentSize > HDVO_MAX_DATA_SIZE)
    return HDVO_ERR_DATA_SEGMENT_TOO_BIG;

  if (dataSegmentSize == 0) {
    return (TMLIBDEV_OK);
  }

  /*
   * Copyback the data segment and then load it into the MCP data memory.
   * Initialised data is stored from MCP data memory address 7 (0 NOKERNEL) onwards. 
   */
  _cache_copyback(dataSegment, dataSegmentSize);
#ifdef HDVO_NOKERNEL
  rval = hdvoLoadMCPDataMemory(dataSegment, dataSegmentSize, 0);
#else
  rval = hdvoLoadMCPDataMemory(dataSegment, dataSegmentSize, 7);
#endif

  return (rval);
}

/***************************************************************************/
/*
 * Function       : hdvoLoadMicroCode
 *                  Loads microcode into MCP program memory.
 *
 * Parameters     : 1. Pointer to microcode
 *                  2. Size of microcode (in bytes)
 *
 * Function Result: Return TMLIBDEV_OK on success.
 *                  TMLIBDEV_ERR_NULL_PARAMETER if the microcode pointer is
 *                  null.
 *                  HDVO_ERR_ADDRESS_NOT_ALIGNED if the microcode is not
 *                  aligned on a 16 byte boundary.
 *                  HDVO_ERR_ZERO_MICROCODE_SIZE if the microcode size is zero.
 *                  HDVO_ERR_MICROCODE_SIZE_TOO_BIG if the microcode size is 
 *                  too big.
 *
 * Precondition   : MCP is not running.
 *
 * Postcondition  : 
 */
#ifndef HDVO_UNFORMATED_UCODE
static tmLibdevErr_t
hdvoLoadMicroCode(UInt8 * microCode, UInt16  microCodeSize)
{
  Int     i;
  UInt32  number1024InstructionTransfers;
  UInt32  remainingInstructions;
  UInt8   mcpPGMPage = 0;
  Bool    doneInitialTransfer = False;
  tmLibdevErr_t rval;

  tmAssert(microCode, TMLIBDEV_ERR_NULL_PARAMETER);

  /*
   * Check the Microcode:
   * 1. Check that the size is not zero.
   * 2. Check that the size fits into internal mcp program memory.
   * 3. Check microcode is aligned on a 16 byte boundary.
   */
 if (!microCodeSize) {
    tmAssert(microCodeSize, HDVO_ERR_ZERO_MICROCODE_SIZE);
    return HDVO_ERR_ZERO_MICROCODE_SIZE;
  }
  else if ((microCodeSize)/3 > HDVO_MAX_MICROCODE_SIZE) {
    tmAssert((microCodeSize)/3 <= HDVO_MAX_MICROCODE_SIZE,
	     HDVO_ERR_MICROCODE_SIZE_TOO_BIG);
    return HDVO_ERR_MICROCODE_SIZE_TOO_BIG;
  }

  if (((UInt32) microCode) & 0x0f) {
    tmAssert(!(((UInt32) microCode) & 0x0f), HDVO_ERR_MICROCODE_NOT_ALIGNED);
    return HDVO_ERR_MICROCODE_NOT_ALIGNED;
  }

  /*
   * Copyback the microcode and then load it into the MCP
   */
  _cache_copyback(microCode, microCodeSize);

  /*
   * Calculate how many transfers we need to do from SDRAM to MCP program
   * memory. We transfer in 1024 instruction sections.
   */
  number1024InstructionTransfers = (microCodeSize/3)/1024;
  remainingInstructions = (microCodeSize/3)%1024;

  /*
   * If we have at least 1024 instructions then we use a loop which
   * down loads 1k instructions at a time. We load 1k of b0 and 1k of b1 data
   * in one go, and transfer them to control crossbar memory modules. We then
   * load 1k of b2 and transfer it to a control crossbar memory module. We then
   * transfer the 1k instructions into MCP program memory. The first time into
   * the loop we need to specify the address in SDRAM; from then onwards we
   * simply let the hardware increment the microcode address.
   */
  for (i = 0; i < number1024InstructionTransfers; i++) {
#ifdef DEBUG
    printf("Transferring 1024 instructions\n");
#endif
    /*
     * transfer 1k of b0 and b1 to IRAM, then transfer them to control
     * crossbar memory module 23 and 22 respectively.
     */
    if (!doneInitialTransfer) {
      rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, True,
			       microCode, True, 0, 2048, HDVO_DMA_HWY_NO_SWAP);
      doneInitialTransfer = True;
    }
    else {
      rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, False, 0, True,
			       0, 2048, HDVO_DMA_HWY_NO_SWAP);
    }
    
    /* 
     * Toggle the IRAM so that the Xbus can access the data.
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());

    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 0, HDVO_SRAM023, 1024,
				  HDVO_8_Bit);
    rval = hdvoTransferIRAMtoCTRL(HDVO_XBUS_A, 1024, HDVO_SRAM022, 1024,
				  HDVO_8_Bit);

    /* 
     * transfer 1k of b2 to IRAM then transfer it to control crossbar memory
     * module 21.
     */
    rval = hdvoSDRAMTransfer(HDVO_DMA_HWY_SDRAM_READ, False, 0, True, 
			     0, 1024, HDVO_DMA_HWY_NO_SWAP);
    /* 
     * Toggle the IRAM so that the Xbus can access the data
     * We need two load-conf/start sequences due to the shadowing of the
     * dma-hwy Load_Conf_Enable bit.
     */
    hdvoEnableDHI_CTRL_Load_Conf_Enable();
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    hdvoIssueProcessingStep(HDVO_SYNCHRONOUS_ISSUE);
    while(hdvoCheckDHI_HSTATUS2_HTS());