📄 l1start.trees
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(* * +-------------------------------------------------------------------+ * | Copyright (c) 1995,2000 TriMedia Technologies Inc. | * | | * | This software is furnished under a license and may only be used | * | and copied in accordance with the terms and conditions of such a | * | license and with the inclusion of this copyright notice. This | * | software or any other copies of this software may not be provided | * | or otherwise made available to any other person. The ownership | * | and title of this software is not transferred. | * | | * | The information in this software is subject to change without | * | any prior notice and should not be construed as a commitment by | * | TriMedia Technologies. | * | | * | This code and information is provided "as is" without any | * | warranty of any kind, either expressed or implied, including but | * | not limited to the implied warranties of merchantability and/or | * | fitness for any particular purpose. | * +-------------------------------------------------------------------+ *)(* * Module name : l1start.trees * * Module type : * * Title : L1 startup code * * Last update : Tue Jul 15 09:53:10 PDT 1997 * *)(*--------------------------------------------------------------------------*)(* Copy this file to l1start.t and then compile as tmcc -x l1start.t *)#define __TMAS__#include <tm1/mmio.h>(*--------------------------------------------------------------------------*)#ifdef __BIG_ENDIAN__ #define INITIAL_PCSW_VALUE 0x0800 (* CS *)#define INITIAL_BIU_CTL_VALUE 0x0200 (* Host Enable *)#else #define INITIAL_PCSW_VALUE 0x0A00 (* CS + Byte Sex *)#define INITIAL_BIU_CTL_VALUE 0x0201 (* Host Enable + Byte Swap Enable *)#endif (*--------------------------------------------------------------------------*) .text .global __start .global _L1main (* defined in l1jtag.c *)__start:__start_DT_0:entree(0).treeinfo regmask "0x00000000000000000fffffffffffffff"; (* iclr just to be sure *) 10 iclr; 20 uimm (INITIAL_PCSW_VALUE); 21 uimm (-1); 22 writepcsw 20 21; (* set up stack: FP and SP *) 30 uimm (__begin_stack_init); 33 wrreg (3) 30; 34 wrreg (4) 30; (* set up return pointer *) 40 uimm(__start_DT_1); 41 wrreg (2) 40; (* configure BIU CTL *) 50 uimm (BIU_CTL); 51 uimm (__MMIO_base_init); 52 iadd 50 51; 53 uimm (INITIAL_BIU_CTL_VALUE); 54 st32 52 53; gotree {_L1main}endtree(* Control returns to __start_DT_1 when L1main() is done with loading * L2 code into SDRAM. Enter into infinite idle loop. *)__start_DT_1:entree(0).treeinfo regmask "0x00000000000000000fffffffffffffff"; gotree {__start_DT_1} (* infinite loop *)endtree
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