📄 cpu.c
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/*
*********************************************************************************************************
* Atmel AT91 SAM7
* CPU Specific Code
*
* (c) Copyright 2004, Micrium, Inc., Weston, FL
* All Rights Reserved
*
*
* File : cpu.c
* By : Eric Shufro
*********************************************************************************************************
*/
#include <includes.h>
/*
*********************************************************************************************************
* CONSTANTS
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* DATA TYPES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* PROTOTYPES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* CPU Port_Init
*
* Description : This function Init the ports of CPU .
*
* Arguments : none
*********************************************************************************************************
*/
/****************************************************************************
【功能说明】IO端口功能、方向设定
****************************************************************************/
void PortInit(void)
{
// PORT A GROUP
/* BIT 9 8 7 6 5 4 3 2 1 0 */
/* A24 A23 A22 A21 A20 A19 A18 A17 A16 A0 */
/* 0 1 1 1 1 1 1 1 1 1 */
rPCONA = 0x0ff;
rPDATA = 0x0ff;
// PORT B GROUP
/* BIT 10 9 8 7 6 5 4 3 2 1 0 */
/* /CS5 /CS4 /CS3 /CS2 /CS1 nWBE3 nWBE2 /SRAS /SCAS SCLK SCKE */
/* EXT NIC USB IDE SMC NC NC Sdram Sdram Sdram Sdram */
/* 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1 */
rPDATB = 0x7ff;
rPCONB = 0x13f;
//改动 by yang 2003.5
//PORT C GROUP
//BUSWIDTH=16 */
/* PC15 14 13 12 11 10 9 8 */
/* o o RXD1 TXD1 o o o o */
/* NC NC Uart1 Uart1 NC NC NC NC */
/* 01 01 11 11 01 01 01 01 */
/* PC7 6 5 4 3 2 1 0 */
/* o o o o o o o o */
/* NC NC NC NC SMCALE SMCCLE SMCCE SMCRB*/
/* 01 01 01 01 01 01 01 01 */
rPDATC = 0x0000; //All IO is low
rPCONC = 0xfff45555;
rPUPC = 0x3000; //PULL UP RESISTOR should be enabled to I/O
//PORT D GROUP
/* PORT D GROUP(I/O OR LCD) */
/* BIT7 6 5 4 3 2 1 0 */
/* VF VM VLINE VCLK VD3 VD2 VD1 VD0 */
/* 01 01 01 01 01 01 01 01 */
rPDATD= 0x55;
rPCOND= 0xaaaa;
rPUPD = 0x00;
//These pins must be set only after CPU's internal LCD controller is enable
/////////////////////////////////////////////////////
//PORT E GROUP
/* Bit 8 7 6 5 4 3 2 1 0 */
/* ENDLAN LED3 LED2 LED1 LED0 BEEP RXD0 TXD0 CLKOUT */
/* 00 01 01 01 01 01 10 10 01 */
rPDATE = 0x157;
rPCONE = 0x5568;
rPUPE = 0xff;
//PORT F GROUP
/* Bit8 7 6 5 4 3 2 1 0 */
/* IISCLK IISDI IISDO IISLRCK Input Input Input IICSDA IICSCL */
/* 100 010 010 001 00 01 01 10 10 */
rPDATF = 0x0;
rPCONF = 0x22445a;
rPUPF = 0x1d3;
//PORT G GROUP
/* BIT7 6 5 4 3 2 1 0 */
/* INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0 */
/* S3 S4 S5 S6 NIC EXT IDE USB */
/* 11 11 11 11 11 11 11 11 */
rPDATG = 0xFF;
rPCONG = 0xFFFF;
rPUPG = 0x00; //should be enabled
rSPUCR=0x7; //D15-D0 pull-up disable
/*定义非Cache区*/
rNCACHBE0 = 0xc0002000;
/*所有的外部硬件中断为低电平触发*/
rEXTINT=0x0040;
rSYSCFG = 0x0e; //使用8K字节的指令缓存,write buffer disable
rNCACHBE0 = 0xc0002000; //定义非Cache区,从0x0000000到0xbffffff 烧写FLASH时不能对FLASH cache
}
/*
*********************************************************************************************************
* CPU_Init
*
* Description: Initialize the number of Flash wait states and setup the on-chip PLL
*********************************************************************************************************
*/
void CPU_Init(void)
{
#if 1
PortInit();
rWTCON = 0;
rNCACHBE0 = 0xc0002000; //Disable I/O cache
// Define Non_Cachable Area: 0x00000000 ~ 0x0C000000
rNCACHBE0 = (((unsigned int)((Non_Cache_End_0)>>12))<<16)|((Non_Cache_Start_0)>>12);
rNCACHBE1 = (((unsigned int)((Non_Cache_End_1)>>12))<<16)|((Non_Cache_Start_1)>>12);
rSYSCFG = CACHECFG; // 使用8K字节的指令缓存, write buffer enabled
// Vectored, IRQ Enabled, FIQ Enabled
rINTCON=0x0;
// All=IRQ mode
rINTMOD=0x0;
// All Masked
rINTMSK=BIT_GLOBAL;
// AT91PS_PMC pPMC = AT91C_BASE_PMC;
// AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(50 <<16)) | AT91C_MC_FWS_2FWS ; /* Set Flash Waite state. */
/* Single Cycle Access at Up to 30 MHz, or 40 */
/* if MCK = 47923200 then there are 50 cycles for 1 uS */
// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS; /* Disable the Watchdog */
// pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN )); /* Set MCK at 47 923 200 */
/* 1 Enabling the Main Oscillator: */
/* SCK = 1/32768 = 30.51 uS */
/* Start up time = 8 * 6 / SCK = 56 * 30.51 = */
/* 1,46484375 ms */
// while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS)) /* Wait the startup time */
// {
// ;
// }
/* Checking the Main Oscillator Frequency (Optional) */
/* Setup the PLL and divider: */
/* - div by 5 Fin = 3,6864 =(18,432 / 5) */
/* - Mul 25+1: Fout = 95,8464 =(3,6864 *26) */
/* for 96 MHz the erroe is 0.16% */
/* Field out NOT USED = 0 */
/* PLLCOUNT pll startup time esrtimate at : 0.844 ms */
/* PLLCOUNT 28 = 0.000844 /(1/32768) */
// pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) | (AT91C_CKGR_PLLCOUNT & (28<<8)) | (AT91C_CKGR_MUL & (25<<16)));
// while(!(pPMC->PMC_SR & AT91C_PMC_LOCK)) /* Wait the startup time */
// {
// ;
// }
// pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2 ; /* Selection of Master Clock and Processor Clock */
/* Select the PLL clock divided by 2 */
#endif
}
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