📄 modulation.mdl
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Name "Insert Zero"
Ports [1, 1]
Position [125, 28, 205, 72]
SourceBlock "commsequence2/Insert Zero"
SourceType "Insert Zero"
insertZeroVector "[1 0 ones(1,2^15-2)]'"
}
Block {
BlockType Reference
Name "Insert Zero1"
Ports [1, 1]
Position [125, 213, 205, 257]
SourceBlock "commsequence2/Insert Zero"
SourceType "Insert Zero"
insertZeroVector "[1 0 ones(1,2^15-2)]'"
}
Block {
BlockType Reference
Name "LC Converter"
Ports [1, 1]
Position [340, 116, 420, 164]
SourceBlock "commutil2/Unipolar to\nBipolar\nConvert"
"er"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Negative"
}
Block {
BlockType Reference
Name "Long Code\nGenerator"
Ports [0, 1]
Position [195, 118, 275, 162]
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "xLongCodeGenerator"
ini_sta "[zeros(1,41) 1]"
shift "xLongCodeMask"
Ts "xSampleTime"
frameBased "off"
sampPerFrame "1"
reset "off"
}
Block {
BlockType Reference
Name "PN I Converter"
Ports [1, 1]
Position [340, 26, 420, 74]
SourceBlock "commutil2/Unipolar to\nBipolar\nConvert"
"er"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Negative"
}
Block {
BlockType Reference
Name "PN Q Converter"
Ports [1, 1]
Position [345, 211, 425, 259]
SourceBlock "commutil2/Unipolar to\nBipolar\nConvert"
"er"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Negative"
}
Block {
BlockType Reference
Name "PN Sequence\nGenerator"
Ports [0, 1]
Position [25, 28, 105, 72]
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "xPNGeneratorI"
ini_sta "[zeros(1,14) 1]"
shift "[zeros(1,14) 1]"
Ts "2^15/1228800/(2^15-1)"
frameBased "on"
sampPerFrame "2^15-1"
reset "off"
}
Block {
BlockType Reference
Name "PN Sequence\nGenerator1"
Ports [0, 1]
Position [25, 213, 105, 257]
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "xPNGeneratorQ"
ini_sta "[zeros(1,14) 1]"
shift "[zeros(1,14) 1]"
Ts "2^15/1228800/(2^15-1)"
frameBased "on"
sampPerFrame "2^15-1"
reset "off"
}
Block {
BlockType Product
Name "Q Product1"
Ports [2, 1]
Position [570, 162, 625, 258]
}
Block {
BlockType Product
Name "Q Product2"
Ports [2, 1]
Position [780, 137, 835, 233]
}
Block {
BlockType Reference
Name "Unbuffer"
Ports [1, 1]
Position [225, 26, 275, 74]
SourceBlock "dspbuff3/Unbuffer"
SourceType "Unbuffer"
ic "0"
}
Block {
BlockType Reference
Name "Unbuffer1"
Ports [1, 1]
Position [225, 211, 275, 259]
SourceBlock "dspbuff3/Unbuffer"
SourceType "Unbuffer"
ic "0"
}
Block {
BlockType UnitDelay
Name "Unit Delay"
Position [475, 165, 510, 205]
SampleTime "xSampleTime"
}
Block {
BlockType Outport
Name "I branch"
Position [885, 78, 915, 92]
}
Block {
BlockType Outport
Name "Q branch"
Position [890, 178, 920, 192]
Port "2"
}
Line {
SrcBlock "PN Sequence\nGenerator"
SrcPort 1
DstBlock "Insert Zero"
DstPort 1
}
Line {
SrcBlock "Insert Zero"
SrcPort 1
DstBlock "Unbuffer"
DstPort 1
}
Line {
SrcBlock "PN Sequence\nGenerator1"
SrcPort 1
DstBlock "Insert Zero1"
DstPort 1
}
Line {
SrcBlock "Insert Zero1"
SrcPort 1
DstBlock "Unbuffer1"
DstPort 1
}
Line {
SrcBlock "Unbuffer"
SrcPort 1
DstBlock "PN I Converter"
DstPort 1
}
Line {
SrcBlock "Long Code\nGenerator"
SrcPort 1
DstBlock "LC Converter"
DstPort 1
}
Line {
SrcBlock "Unbuffer1"
SrcPort 1
DstBlock "PN Q Converter"
DstPort 1
}
Line {
SrcBlock "LC Converter"
SrcPort 1
Points [0, 0; 25, 0]
Branch {
Points [0, 45]
DstBlock "Unit Delay"
DstPort 1
}
Branch {
Points [0, -35]
DstBlock "I Product"
DstPort 2
}
}
Line {
SrcBlock "PN I Converter"
SrcPort 1
Points [40, 0; 0, 10]
DstBlock "I Product"
DstPort 1
}
Line {
SrcBlock "Unit Delay"
SrcPort 1
DstBlock "Q Product1"
DstPort 1
}
Line {
SrcBlock "PN Q Converter"
SrcPort 1
DstBlock "Q Product1"
DstPort 2
}
Line {
SrcBlock "Q Product1"
SrcPort 1
DstBlock "Conversion"
DstPort 1
}
Line {
SrcBlock "Conversion"
SrcPort 1
DstBlock "Q Product2"
DstPort 2
}
Line {
SrcBlock "I Product"
SrcPort 1
Points [0, 0; 125, 0]
Branch {
DstBlock "I branch"
DstPort 1
}
Branch {
Points [0, 75]
DstBlock "Q Product2"
DstPort 1
}
}
Line {
SrcBlock "Q Product2"
SrcPort 1
DstBlock "Q branch"
DstPort 1
}
}
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [240, 56, 285, 89]
InputSameDT off
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [240, 151, 285, 184]
InputSameDT off
}
Block {
BlockType Product
Name "Product2"
Ports [2, 1]
Position [240, 241, 285, 274]
InputSameDT off
}
Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [240, 326, 285, 359]
InputSameDT off
}
Block {
BlockType RealImagToComplex
Name "Real-Imag to\nComplex"
Ports [2, 1]
Position [540, 158, 595, 247]
Input "Real and imag"
}
Block {
BlockType Outport
Name "Signal"
Position [715, 228, 745, 242]
}
Line {
SrcBlock "SCH2"
SrcPort 1
DstBlock "Add"
DstPort 1
}
Line {
SrcBlock "PCH"
SrcPort 1
DstBlock "Add"
DstPort 2
}
Line {
SrcBlock "DCCH"
SrcPort 1
Points [5, 0; 0, 5]
DstBlock "Add"
DstPort 3
}
Line {
SrcBlock "FCH"
SrcPort 1
Points [10, 0; 0, 5]
DstBlock "Add1"
DstPort 1
}
Line {
SrcBlock "SCH1/CCCH/EACH"
SrcPort 1
Points [10, 0; 0, -5]
DstBlock "Add1"
DstPort 2
}
Line {
SrcBlock "PN Sequence"
SrcPort 1
Points [40, 0; 0, 25]
Branch {
Points [0, 285]
DstBlock "Product3"
DstPort 2
}
Branch {
DstBlock "Product"
DstPort 1
}
}
Line {
SrcBlock "PN Sequence"
SrcPort 2
Points [45, 0; 0, 105]
Branch {
DstBlock "Product1"
DstPort 2
}
Branch {
Points [0, 75]
DstBlock "Product2"
DstPort 1
}
}
Line {
SrcBlock "Add"
SrcPort 1
Points [50, 0; 0, -20]
Branch {
DstBlock "Product1"
DstPort 1
}
Branch {
Points [0, -80]
DstBlock "Product"
DstPort 2
}
}
Line {
SrcBlock "Add1"
SrcPort 1
Points [0, 0; 60, 0]
Branch {
DstBlock "Product2"
DstPort 2
}
Branch {
DstBlock "Product3"
DstPort 1
}
}
Line {
SrcBlock "Product"
SrcPort 1
Points [20, 0; 0, 25]
DstBlock "Add2"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
Points [20, 0; 0, 105]
DstBlock "Add3"
DstPort 1
}
Line {
SrcBlock "Product2"
SrcPort 1
Points [40, 0]
DstBlock "Add2"
DstPort 2
}
Line {
SrcBlock "Product3"
SrcPort 1
Points [20, 0; 0, -40]
DstBlock "Add3"
DstPort 2
}
Line {
SrcBlock "Add3"
SrcPort 1
DstBlock "FIR\nInterpolation1"
DstPort 1
}
Line {
SrcBlock "Add2"
SrcPort 1
DstBlock "FIR\nInterpolation"
DstPort 1
}
Line {
SrcBlock "FIR\nInterpolation"
SrcPort 1
Points [10, 0; 0, 65]
DstBlock "Real-Imag to\nComplex"
DstPort 1
}
Line {
SrcBlock "FIR\nInterpolation1"
SrcPort 1
Points [10, 0; 0, -65]
DstBlock "Real-Imag to\nComplex"
DstPort 2
}
Line {
SrcBlock "Real-Imag to\nComplex"
SrcPort 1
DstBlock "Gain Product4"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
Points [15, 0; 0, -80]
DstBlock "Gain Product4"
DstPort 2
}
Line {
SrcBlock "Gain Product4"
SrcPort 1
DstBlock "Signal"
DstPort 1
}
}
}
}
}
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