📄 tingzhimokuai.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity tingzhimokuai is
port(c0,c1,c2,c3,e0,e1,e2,e3:in std_logic;
en0:out std_logic);
end tingzhimokuai;
architecture tingzhimokuai_arc of tingzhimokuai is
begin
process(c0,c1,c2,c3,e0,e1,e2,e3)
begin
if c0=e0 and c1=e1 and c2=e2 and c3=e3 then
en0<='0';
else
en0<='1';
end if;
end process;
end tingzhimokuai_arc;
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