📄 drvspi.c
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/* Description: */
/* Close the specified SPI module and disable the SPI interrupt. */
/*---------------------------------------------------------------------------------------------------------*/
void DrvSPI_Close(E_DRVSPI_PORT eSpiPort)
{
int32_t i32TimeOut;
g_sSpiHandler[eSpiPort].bInUse = FALSE;
g_sSpiHandler[eSpiPort].pfnOneTransDoneCallBack = NULL;
g_sSpiHandler[eSpiPort].u32OneTransDoneUserData = 0;
g_sSpiHandler[eSpiPort].pfn3WireStartCallBack = NULL;
g_sSpiHandler[eSpiPort].u32ThreeWireStartUserData = 0;
/* Check SPI state */
i32TimeOut = 0x10000;
while(SPI_PORT[eSpiPort]->CNTRL.GO_BUSY == 1)
{
if(i32TimeOut-- <= 0)
break;
}
if(eSpiPort == eDRVSPI_PORT0)
{
NVIC_DisableIRQ(SPI0_IRQn);
SYS->IPRSTC2.SPI0_RST=1;
SYS->IPRSTC2.SPI0_RST=0;
SYSCLK->APBCLK.SPI0_EN=0;
}
else if(eSpiPort == eDRVSPI_PORT1)
{
NVIC_DisableIRQ(SPI1_IRQn);
SYS->IPRSTC2.SPI1_RST=1;
SYS->IPRSTC2.SPI1_RST=0;
SYSCLK->APBCLK.SPI1_EN=0;
}
else if(eSpiPort == eDRVSPI_PORT2)
{
NVIC_DisableIRQ(SPI2_IRQn);
SYS->IPRSTC2.SPI2_RST=1;
SYS->IPRSTC2.SPI2_RST=0;
SYSCLK->APBCLK.SPI2_EN=0;
}
else
{
NVIC_DisableIRQ(SPI3_IRQn);
SYS->IPRSTC2.SPI3_RST=1;
SYS->IPRSTC2.SPI3_RST=0;
SYSCLK->APBCLK.SPI3_EN=0;
}
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvSPI_Set2BitTransferMode */
/* */
/* Parameters: */
/* eSpiPort [in]: Specify the SPI port */
/* bEnable [in]: Enable (TRUE) / Disable (FALSE) */
/* */
/* Returns: */
/* None. */
/* */
/* Description: */
/* Set 2-bit transfer mode. */
/* When enable 2-bit transfer mode, the Tx_NUM must be configure as 0x00 (one transaction in one */
/* transfer.) */
/*---------------------------------------------------------------------------------------------------------*/
void DrvSPI_Set2BitTransferMode(E_DRVSPI_PORT eSpiPort, uint8_t bEnable)
{
if(bEnable)
{
SPI_PORT[eSpiPort]->CNTRL.TWOB = 1;
SPI_PORT[eSpiPort]->CNTRL.TX_NUM = 0;
}
else
SPI_PORT[eSpiPort]->CNTRL.TWOB = 0;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvSPI_SetEndian */
/* */
/* Parameters: */
/* eSpiPort [in]: Specify the SPI port */
/* eEndian [in]: Specify LSB first or MSB first (eDRVSPI_LSB_FIRST / eDRVSPI_MSB_FIRST) */
/* */
/* Returns: */
/* None. */
/* */
/* Description: */
/* Dertermine to transfer data with LSB first or MSB first */
/*---------------------------------------------------------------------------------------------------------*/
void DrvSPI_SetEndian(E_DRVSPI_PORT eSpiPort, E_DRVSPI_ENDIAN eEndian)
{
if(eEndian == eDRVSPI_LSB_FIRST)
SPI_PORT[eSpiPort]->CNTRL.LSB = 1;
else
SPI_PORT[eSpiPort]->CNTRL.LSB = 0;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvSPI_SetBitLength */
/* */
/* Parameters: */
/* eSpiPort [in]: Specify the SPI port */
/* i32BitLength [in]: Specify the bit length (1~32 bits) */
/* */
/* Returns: */
/* E_SUCCESS: Success. */
/* E_DRVSPI_ERR_BIT_LENGTH: The bit length is out of range. */
/* */
/* Description: */
/* Set the bit length of SPI transfer. */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvSPI_SetBitLength(E_DRVSPI_PORT eSpiPort, int32_t i32BitLength)
{
if((i32BitLength < 1) || (i32BitLength > 32))
{
return E_DRVSPI_ERR_BIT_LENGTH;
}
if(i32BitLength == 32)
i32BitLength = 0;
SPI_PORT[eSpiPort]->CNTRL.TX_BIT_LEN = i32BitLength;
return E_SUCCESS;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvSPI_SetByteReorder */
/* */
/* Parameters: */
/* eSpiPort [in]: Specify the SPI port */
/* eOption [in]: the options of Byte Reorder function and Byte Suspend function. */
/* eDRVSPI_BYTE_REORDER_SUSPEND_DISABLE: both Byte Reorder function and Byte Suspend */
/* function are disabled. */
/* eDRVSPI_BYTE_REORDER_SUSPEND : both Byte Reorder function and Byte Suspend */
/* function are enabled. */
/* eDRVSPI_BYTE_REORDER : only enable the Byte Reorder function. */
/* eDRVSPI_BYTE_SUSPEND : only enable the Byte Suspend function. */
/* The Byte Suspend function is only available in 32-bit transaction. */
/* */
/* Returns: */
/* E_SUCCESS : Success. */
/* E_DRVSPI_ERR_BIT_LENGTH: The bit length is not 16-, 24- or 32-bit. */
/* */
/* Description: */
/* Enable/disable Byte Reorder function. */
/* The Byte Reorder function is supported only in 16-, 24- and 32-bit transaction mode. */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvSPI_SetByteReorder(E_DRVSPI_PORT eSpiPort, E_DRVSPI_BYTE_REORDER eOption)
{
/* The Byte Suspend function is only available in 32-bit transaction. */
if( (eOption==eDRVSPI_BYTE_REORDER_SUSPEND)||(eOption==eDRVSPI_BYTE_SUSPEND) )
if( (SPI_PORT[eSpiPort]->CNTRL.TX_BIT_LEN) != 0 )
return E_DRVSPI_ERR_BIT_LENGTH;
/* The Byte Reorder function is supported only in 16-, 24- and 32-bit transaction mode. */
else if( eOption==eDRVSPI_BYTE_REORDER )
if( (SPI_PORT[eSpiPort]->CNTRL.TX_BIT_LEN) % 8 )
return E_DRVSPI_ERR_BIT_LENGTH;
SPI_PORT[eSpiPort]->CNTRL.REORDER = eOption;
return E_SUCCESS;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvSPI_SetSuspendCycle */
/* */
/* Parameters: */
/* eSpiPort [in]: Specify the SPI port. */
/* i32Interval [in]: In burst transfer mode, this value specified the delay clocks between successive */
/* transactions. If the Byte Suspend function is enabled, it specified the delay */
/* clocks among each byte. It could be 2~17 which indicate 2~17 SPI clock cycles. */
/* In FIFO mode, it could be 2~15 and 0. 0 indicates the maximum suspend interval; 2 */
/* indicates the minimum suspend interval. Please refer to TRM for the actual suspend */
/* interval. */
/* */
/* Returns: */
/* E_DRVSPI_ERR_SUSPEND_INTERVAL: The suspend interval setting is out of range. */
/* E_SUCCESS: Success. */
/* */
/* Description: */
/* Set the number of clock cycle of the suspend interval. Only for master mode. */
/* The suspend cycle setting is shared with burst mode, byte suspend function and FIFO mode. */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvSPI_SetSuspendCycle(E_DRVSPI_PORT eSpiPort, int32_t i32Interval)
{
if( SPI_PORT[eSpiPort]->CNTRL.FIFO==1 ) /* In FIFO mode, it could be 2~15 and 0. */
{
if( (i32Interval < 2) || (i32Interval > 15) )
{
/* If out of range, specify the maximum suspend cycle and return error code. */
SPI_PORT[eSpiPort]->CNTRL.SP_CYCLE = 0;
if(i32Interval==0)
return E_SUCCESS;
else
return E_DRVSPI_ERR_SUSPEND_INTERVAL;
}
SPI_PORT[eSpiPort]->CNTRL.SP_CYCLE = i32Interval;
return E_SUCCESS;
}
else /* In burst mode and byte suspend function, it could be 2~17. */
{
if((i32Interval < 2) || (i32Interval > 17))
{
/* If out of range, specify the maximum suspend cycle and return error code. */
SPI_PORT[eSpiPort]->CNTRL.SP_CYCLE = 15;
return E_DRVSPI_ERR_SUSPEND_INTERVAL;
}
SPI_PORT[eSpiPort]->CNTRL.SP_CYCLE = i32Interval-2;
return E_SUCCESS;
}
}
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