📄 drvpdma.c
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/*---------------------------------------------------------------------------------------------------------*/
/* */
/* Copyright(c) 2009 Nuvoton Technology Corp. All rights reserved. */
/* */
/*---------------------------------------------------------------------------------------------------------*/
#include <stdio.h>
#include "NUC1xx.h"
/*---------------------------------------------------------------------------------------------------------*/
/* Includes of local headers */
/*---------------------------------------------------------------------------------------------------------*/
#include "DrvPDMA.h"
/*---------------------------------------------------------------------------------------------------------*/
/* Macro, type and constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define MAX_CHANNEL_NUM 9
#define CHANNEL_OFFSET 0x100
#define MAX_TRANSFER_BYTE_COUNT 0xFFFF
static PFN_DRVPDMA_CALLBACK g_pfnPDMACallback[MAX_CHANNEL_NUM][3] = {
{0,0,0},
{0,0,0},
{0,0,0},
{0,0,0},
{0,0,0}};
/*---------------------------------------------------------------------------------------------------------*/
/* Global variables */
/*---------------------------------------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_Init */
/* */
/* Parameter: */
/* None */
/* Returns: */
/* None */
/* Description: */
/* The function is used to enable AHB PDMA engine clock */
/*---------------------------------------------------------------------------------------------------------*/
void DrvPDMA_Init(void)
{
/* Enable PDMA Clock */
SYSCLK->AHBCLK.PDMA_EN =1;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_Close */
/* */
/* Parameter: */
/* None */
/* Returns: */
/* None */
/* Description: */
/* The function is used to disable all PDMA channel clock and AHB PDMA clock */
/*---------------------------------------------------------------------------------------------------------*/
void DrvPDMA_Close(void)
{
/* Disable All PDMA clock */
outpw(&PDMA_GCR->GCRCSR,0x0);
/* Disable PDMA clock */
SYSCLK->AHBCLK.PDMA_EN =0;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_Open */
/* */
/* Parameter: */
/* eChannel -[in] PDMA Source: eDRVPDMA_CHANNEL_0 ~ 8 */
/* sParam -[in] - the struct parameter to configure PDMA */
/* It consists of */
/* sSrcCtrl.u32Addr - Source Address */
/* sSrcCtrl.eAddrDirection - Source Direction */
/* sDestCtrl.u32Addr - Destination Address */
/* sDestCtrl.eAddrDirection - Destination Direction */
/* u8TransWidth - Transfer Width */
/* u8Mode - Operation Mode */
/* i32ByteCnt - Byte Count */
/* Returns: */
/* E_SUCCESS Sueccess */
/* E_DRVPDMA_ERR_PORT_INVALID Invalid port number */
/* */
/* Description: */
/* The function configures PDMA settin */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvPDMA_Open(E_DRVPDMA_CHANNEL_INDEX eChannel,STR_PDMA_T *sParam)
{
PDMA_T * tPDMA;
SYSCLK->AHBCLK.PDMA_EN =1;
/*-----------------------------------------------------------------------------------------------------*/
/* Check PDMA channel */
/*-----------------------------------------------------------------------------------------------------*/
if (eChannel > eDRVPDMA_CHANNEL_8)
{
return E_DRVPDMA_ERR_PORT_INVALID;
}
tPDMA = (PDMA_T *)((uint32_t)PDMA0 + eChannel * CHANNEL_OFFSET);
/*-----------------------------------------------------------------------------------------------------*/
/* Set PDMA settings */
/*-----------------------------------------------------------------------------------------------------*/
outpw(&PDMA_GCR->GCRCSR,inpw(&PDMA_GCR->GCRCSR) | 1<<(eChannel+8) ); /* Enable Channel Clock */
tPDMA->CSR.PDMACEN = 1; /* Enable PDMA Channel */
tPDMA->SAR = sParam->sSrcCtrl.u32Addr; /* Set Source Address */
tPDMA->DAR = sParam->sDestCtrl.u32Addr; /* Set Destination Address */
tPDMA->CSR.SAD_SEL = sParam->sSrcCtrl.eAddrDirection;
tPDMA->CSR.DAD_SEL = sParam->sDestCtrl.eAddrDirection;
tPDMA->CSR.APB_TWS = sParam->u8TransWidth;
tPDMA->CSR.MODE_SEL = sParam->u8Mode; /* Set Control Register */
tPDMA->u32BCR = sParam->i32ByteCnt; /* Set Byte Count Register */
return E_SUCCESS;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_IsCHBusy */
/* */
/* Parameter: */
/* eChannel -[in] PDMA Source: eDRVPDMA_CHANNEL_0 ~ 8 */
/* Returns: */
/* TRUE: The Channel is busy. */
/* FALSE: The Channel is usable. */
/* */
/* Description: */
/* The function is used to Get Channel Enable/Disable status */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvPDMA_IsCHBusy(E_DRVPDMA_CHANNEL_INDEX eChannel)
{
PDMA_T * tPDMA;
if (eChannel > MAX_CHANNEL_NUM ) /* Check Channel is valid */
return E_DRVPDMA_ERR_PORT_INVALID;
tPDMA = (PDMA_T *)((uint32_t)PDMA0 + eChannel * CHANNEL_OFFSET);
return (tPDMA->CSR.TRIG_EN)?TRUE:FALSE; /* Check Channel is triggering or not */
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_GetTransferLength */
/* */
/* Parameter: */
/* eChannel -[in] PDMA Source: eDRVPDMA_CHANNEL_0 ~ 8 */
/* pu32TransferLength -[out] The data pointer to save transfer length */
/* Returns: */
/* */
/* Side effects: */
/* E_SUCCESS Success */
/* E_DRVPDMA_ERR_PORT_INVALID Invalid port number */
/* Description: */
/* The function is used to get channel transfer length setting */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvPDMA_GetTransferLength(E_DRVPDMA_CHANNEL_INDEX eChannel, uint32_t* pu32TransferLength)
{
PDMA_T * tPDMA;
if (eChannel > MAX_CHANNEL_NUM ) /* Check Channel is valid */
return E_DRVPDMA_ERR_PORT_INVALID;
tPDMA = (PDMA_T *)((uint32_t)PDMA0 + eChannel * CHANNEL_OFFSET);
*pu32TransferLength = tPDMA->u32BCR; /* Get Transfer Length */
return E_SUCCESS;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_SetAPBTransferWidth */
/* */
/* Parameter: */
/* eChannel -[in] PDMA Source: eDRVPDMA_CHANNEL_0 ~ 8 */
/* eTransferWidth -[in] Transfer width.It could be */
/* eDRVPDMA_WIDTH_32BITS */
/* eDRVPDMA_WIDTH_8BITS */
/* eDRVPDMA_WIDTH_16BITS */
/* Returns: */
/* E_SUCCESS Success */
/* E_DRVPDMA_ERR_PORT_INVALID Invalid port number */
/* Description: */
/* The function is used to set APB transfer width for channelx */
/*---------------------------------------------------------------------------------------------------------*/
int32_t DrvPDMA_SetAPBTransferWidth(E_DRVPDMA_CHANNEL_INDEX eChannel,E_DRVPDMA_TRANSFER_WIDTH eTransferWidth)
{
PDMA_T * tPDMA;
if (eChannel > MAX_CHANNEL_NUM ) /* Check Channel is valid */
return E_DRVPDMA_ERR_PORT_INVALID;
tPDMA = (PDMA_T *)((uint32_t)PDMA0 + eChannel * CHANNEL_OFFSET);
tPDMA->CSR.APB_TWS = eTransferWidth; /* Set PDMA Transfer Length */
return E_SUCCESS;
}
/*---------------------------------------------------------------------------------------------------------*/
/* Function: DrvPDMA_GetAPBTransferWidth */
/* */
/* Parameter: */
/* eChannel -[in] PDMA Source: eDRVPDMA_CHANNEL_0 ~ 8 */
/* Returns: */
/* 0: One word (32 bits) is transferred for every PDMA operation. */
/* 1: One byte (8 bits) is transferred for every PDMA operation. */
/* 2: One half-word (16 bits) is transferred for every PDMA operation. */
/* E_DRVPDMA_ERR_PORT_INVALID: invalid port number */
/* */
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