📄 modelx.c
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out_dr = FLD (out_dr); referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add3.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_slli.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_st (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles;#undef FLD}static intmodel_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_dr = FLD (in_src2); out_dr = FLD (out_src2); cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_src1 = 0; INT in_src2 = 0; in_src1 = FLD (in_src1); in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_dr = FLD (in_src2); out_dr = FLD (out_src2); cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; INT in_dr = -1; INT out_dr = -1; in_sr = FLD (in_sr); in_dr = FLD (in_dr); out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; referenced |= 1 << 2; cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles;#undef FLD}static intmodel_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg){#define FLD(f) abuf->fields.sfmt_add.f const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; INT in_sr = -1; IN
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