movb.s

gdb-6.0 linux 下的调试工具

	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext65
	fail
.Lnext65:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext66
	fail
.Lnext66:			; OK, pass on.

mov_b_postdec_to_postdec:	; reg post-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @ers-, @erd-

	mov.l	#byte_src, er1
	mov.l	#byte_dst, er0
	mov.b	@er1-, @er0-
;;;	.word	0x0178
;;;	.word	0xa1a0

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst-1 er0
	test_h_gr32  byte_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext75
	fail
.Lnext75:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext76
	fail
.Lnext76:			; OK, pass on.

mov_b_preinc_to_preinc:		; reg pre-increment, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @+ers, @+erd

	mov.l	#byte_src-1, er1
	mov.l	#byte_dst-1, er0
	mov.b	@+er1, @+er0
;;;	.word	0x0178
;;;	.word	0x9190

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst er0
	test_h_gr32  byte_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext85
	fail
.Lnext85:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext86
	fail
.Lnext86:				; OK, pass on.

mov_b_predec_to_predec:		; reg pre-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @-ers, @-erd

	mov.l	#byte_src+1, er1
	mov.l	#byte_dst+1, er0
	mov.b	@-er1, @-er0
;;;	.word	0x0178
;;;	.word	0xb1b0

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst er0
	test_h_gr32  byte_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext95
	fail
.Lnext95:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext96
	fail
.Lnext96:			; OK, pass on.

mov_b_disp2_to_disp2:		; reg 2-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @(dd:2, ers), @(dd:2, erd)

	mov.l	#byte_src-1, er1
	mov.l	#byte_dst-2, er0
	mov.b	@(1:2, er1), @(2:2, er0)
;;; 	.word	0x0178
;;; 	.word	0x1120

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst-2 er0
	test_h_gr32  byte_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext105
	fail
.Lnext105:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext106
	fail
.Lnext106:			; OK, pass on.

mov_b_disp16_to_disp16:		; reg 16-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @(dd:16, ers), @(dd:16, erd)

	mov.l	#byte_src-1, er1
	mov.l	#byte_dst-2, er0
	mov.b	@(1:16, er1), @(2:16, er0)
;;; 	.word	0x0178
;;; 	.word	0xc1c0
;;; 	.word	0x0001
;;; 	.word	0x0002

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst-2 er0
	test_h_gr32  byte_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext115
	fail
.Lnext115:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext116
	fail
.Lnext116:			; OK, pass on.

mov_b_disp32_to_disp32:		; reg 32-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @(dd:32, ers), @(dd:32, erd)

	mov.l	#byte_src-1, er1
	mov.l	#byte_dst-2, er0
	mov.b	@(1:32, er1), @(2:32, er0)
;;; 	.word	0x0178
;;; 	.word	0xc9c8
;;;	.long	1
;;;	.long	2

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  byte_dst-2 er0
	test_h_gr32  byte_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext125
	fail
.Lnext125:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext126
	fail
.Lnext126:				; OK, pass on.

mov_b_indexb16_to_indexb16:	; reg 16-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff01, er1
	mov.l	#0xffffff02, er0
	;; mov.b @(dd:16, rs.b), @(dd:16, rd.b)
	set_ccr_zero
	mov.b	@(byte_src-1:16, r1.b), @(byte_dst-2:16, r0.b)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0xffffff02 er0
	test_h_gr32  0xffffff01 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_indexw16_to_indewb16:	; reg 16-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0003, er1
	mov.l	#0xffff0004, er0
	;; mov.b @(dd:16, rs.w), @(dd:16, rd.w)
	set_ccr_zero
	mov.b	@(byte_src-3:16, r1.w), @(byte_dst-4:16, r0.w)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0xffff0004 er0
	test_h_gr32  0xffff0003 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_indexl16_to_indexl16:	; reg 16-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000005, er1
	mov.l	#0x00000006, er0
	;; mov.b @(dd:16, ers.l), @(dd:16, erd.l)
	set_ccr_zero
	mov.b	@(byte_src-5:16, er1.l), @(byte_dst-6:16, er0.l)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0x00000006 er0
	test_h_gr32  0x00000005 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_indexb32_to_indexb32:	; reg 32-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff01, er1
	mov.l	#0xffffff02, er0
	set_ccr_zero
	;; mov.b @(dd:32, rs.b), @(dd:32, rd.b)
	mov.b	@(byte_src-1:32, r1.b), @(byte_dst-2:32, r0.b)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0xffffff02 er0
	test_h_gr32  0xffffff01 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_indexw32_to_indexw32:	; reg 32-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0003, er1
	mov.l	#0xffff0004, er0
	set_ccr_zero
	;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
	mov.b	@(byte_src-3:32, r1.w), @(byte_dst-4:32, r0.w)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0xffff0004 er0
	test_h_gr32  0xffff0003 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_indexl32_to_indexl32:	; reg 32-bit indexed, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000005, er1
	mov.l	#0x00000006, er0
	set_ccr_zero
	;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
	mov.b	@(byte_src-5:32, er1.l), @(byte_dst-6:32, er0.l)

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  0x00000006 er0
	test_h_gr32  0x00000005 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	bne	fail1
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	beq	fail1

mov_b_abs16_to_abs16:		; 16-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @aa:16, @aa:16

	mov.b	@byte_src:16, @byte_dst:16
;;; 	.word	0x0178
;;; 	.word	0x4040
;;;	.word	@byte_src
;;;	.word	@byte_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear


	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext135
	fail
.Lnext135:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext136
	fail
.Lnext136:				; OK, pass on.

mov_b_abs32_to_abs32:		; 32-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b @aa:32, @aa:32

	mov.b	@byte_src:32, @byte_dst:32
;;; 	.word	0x0178
;;; 	.word	0x4848
;;;	.long	@byte_src
;;;	.long	@byte_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_src, @byte_dst
	beq	.Lnext145
	fail
.Lnext145:
	;; Now clear the destination location, and verify that.
	mov.b	#0, @byte_dst
	cmp.b	@byte_src, @byte_dst
	bne	.Lnext146
	fail
.Lnext146:				; OK, pass on.


.endif

	pass

	exit 0

fail1:
	fail