movb.s

gdb-6.0 linux 下的调试工具

	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext9
	fail
.Lnext9:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_abs32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @aa:32
	mov.b	#0xa5:8, @byte_dst:32	; 32-bit address-direct operand
;;;	.word	0x017d
;;;	.word	0x48a5
;;;	.long	@byte_dst

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure _ALL_ general regs not disturbed
	test_gr_a5a5 1		; (first, because on h8/300 we must use one
	test_gr_a5a5 2		; to examine the destination memory).
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext10
	fail
.Lnext10:
	mov.b	#0, @byte_dst	; zero it again for the next use.

.endif

	;;
	;; Move byte from register source
	;; 

mov_b_reg8_to_reg8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, erd
	mov.b	#0x12, r1l
	mov.b	r1l, r0l	; Register 8-bit operand
;;;	.word	0x0c98

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear
	test_h_gr16 0xa512 r0
	test_h_gr16 0xa512 r1	; mov src unchanged
.if (sim_cpu)
	test_h_gr32 0xa5a5a512 er0
	test_h_gr32 0xa5a5a512 er1	; mov src unchanged
.endif
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7


mov_b_reg8_to_indirect:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @erd
	mov.l	#byte_dst, er1
	mov.b	r0l, @er1	; Register indirect operand
;;;	.word	0x6898

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	mov.b	@byte_dst, r0l
	cmp.b	r2l, r0l
	beq	.Lnext44
	fail
.Lnext44:
	mov.b	#0, r0l
	mov.b	r0l, @byte_dst	; zero it again for the next use.

.if (sim_cpu == h8sx)
mov_b_reg8_to_postinc:		; post-increment from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @erd+
	mov.l	#byte_dst, er1
	mov.b	r0l, @er1+	; Register post-incr operand
;;;	.word	0x0173
;;;	.word	0x6c98

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst+1, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	r2l, @byte_dst
	beq	.Lnext49
	fail
.Lnext49:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_postdec:		; post-decrement from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @erd-
	mov.l	#byte_dst, er1
	mov.b	r0l, @er1-	; Register post-decr operand
;;;	.word	0x0171
;;;	.word	0x6c98

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-1, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	r2l, @byte_dst
	beq	.Lnext50
	fail
.Lnext50:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_preinc:		; pre-increment from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @+erd
	mov.l	#byte_dst-1, er1
	mov.b	r0l, @+er1	; Register pre-incr operand
;;;	.word	0x0172
;;;	.word	0x6c98

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	r2l, @byte_dst
	beq	.Lnext51
	fail
.Lnext51:
	mov.b	#0, @byte_dst	; zero it again for the next use.
.endif

mov_b_reg8_to_predec:		; pre-decrement from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @-erd
	mov.l	#byte_dst+1, er1
	mov.b	r0l, @-er1	; Register pre-decr operand
;;;	.word	0x6c98

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	mov.b	@byte_dst, r0l
	cmp.b	r2l, r0l
	beq	.Lnext48
	fail
.Lnext48:
	mov.b	#0, r0l
	mov.b	r0l, @byte_dst	; zero it again for the next use.

.if (sim_cpu == h8sx)
mov_b_reg8_to_disp2:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @(dd:2, erd)
	mov.l	#byte_dst-3, er1
	mov.b	r0l, @(3:2, er1)	; Register plus 2-bit disp. operand
;;;	.word	0x0173
;;;	.word	0x6898

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-3, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	r2l, @byte_dst
	beq	.Lnext52
	fail
.Lnext52:
	mov.b	#0, @byte_dst	; zero it again for the next use.
.endif

mov_b_reg8_to_disp16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @(dd:16, erd)
	mov.l	#byte_dst-4, er1
	mov.b	r0l, @(4:16, er1)	; Register plus 16-bit disp. operand
;;;	.word	0x6e98
;;;	.word	0x0004

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	byte_dst-4, er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	mov.b	@byte_dst, r0l
	cmp.b	r2l, r0l
	beq	.Lnext45
	fail
.Lnext45:
	mov.b	#0, r0l
	mov.b	r0l, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_disp32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @(dd:32, erd)
	mov.l	#byte_dst-8, er1
	mov.b	r0l, @(8:32, er1)	; Register plus 32-bit disp. operand
;;;	.word	0x7810
;;;	.word	0x6aa8
;;;	.long	8

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	byte_dst-8, er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	mov.b	@byte_dst, r0l
	cmp.b	r2l, r0l
	beq	.Lnext46
	fail
.Lnext46:
	mov.b	#0, r0l
	mov.b	r0l, @byte_dst	; zero it again for the next use.

.if (sim_cpu == h8sx)
mov_b_reg8_to_indexb16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff01, er1
	set_ccr_zero
	;; mov.b ers, @(dd:16, rd.b)
	mov.b	r0l, @(byte_dst-1:16, r1.b)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0xffffff01 er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_indexw16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0002, er1
	set_ccr_zero
	;; mov.b ers, @(dd:16, rd.w)
	mov.b	r0l, @(byte_dst-2:16, r1.w)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0xffff0002 er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_indexl16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000003, er1
	set_ccr_zero
	;; mov.b ers, @(dd:16, erd.l)
	mov.b	r0l, @(byte_dst-3:16, er1.l)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0x00000003 er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_indexb32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff04 er1
	set_ccr_zero
	;; mov.b ers, @(dd:32, rd.b)
	mov.b	r0l, @(byte_dst-4:32, r1.b)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0xffffff04, er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_indexw32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0005 er1
	set_ccr_zero
	;; mov.b ers, @(dd:32, rd.w)
	mov.b	r0l, @(byte_dst-5:32, r1.w)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0xffff0005, er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_reg8_to_indexl32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000006 er1
	set_ccr_zero
	;; mov.b ers, @(dd:32, erd.l)
	mov.b	r0l, @(byte_dst-6:32, er1.l)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32	0x00000006, er1
	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r0l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.
.endif

.if (sim_cpu == h8sx)
mov_b_reg8_to_abs8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern

	mov.l	#byte_dst-20, er0
	ldc	er0, sbr
	set_ccr_zero
	;; mov.b ers, @aa:8
	mov.b	r1l, @20:8	; 8-bit address-direct (sbr-relative) operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32  byte_dst-20, er0
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	@byte_dst, r1l
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.
.endif

mov_b_reg8_to_abs16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b ers, @aa:16
	mov.b	r0l, @byte_dst:16	; 16-bit address-direct operand
;;;	.word	0x6a88
;;;	.word	@byte_dst

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure _ALL_ general regs not disturbed
	test_gr_a5a5 1		; (first, because on h8/300 we must use one