movb.s

gdb-6.0 linux 下的调试工具

# Hitachi H8 testcase 'mov.w'
# mach(): h8300h h8300s h8sx
# as(h8300h):	--defsym sim_cpu=1
# as(h8300s):	--defsym sim_cpu=2
# as(h8sx):	--defsym sim_cpu=3
# ld(h8300h):	-m h8300helf
# ld(h8300s):	-m h8300self
# ld(h8sx):	-m h8300sxelf	

	.include "testutils.inc"

	start

	.data
	.align	4
byte_src:
	.byte	0x77
byte_dst:
	.byte	0

	.text

	;;
	;; Move byte from immediate source
	;; 

.if (sim_cpu == h8sx)
mov_b_imm8_to_reg8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, rd
	mov.b	#0x77:8, r0l	; Immediate 3-bit operand
;;;	.word	0xf877

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a5a577 er0

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
.endif

.if (sim_cpu == h8sx)
mov_b_imm4_to_abs16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:4, @aa:16
	mov.b	#0xf:4, @byte_dst:16	; 16-bit address-direct operand
;;;	.word	0x6adf
;;;	.word	@byte_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure _ALL_ general regs not disturbed
	test_gr_a5a5 1		; (first, because on h8/300 we must use one
	test_gr_a5a5 2		; to examine the destination memory).
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xf, @byte_dst
	beq	.Lnext21
	fail
.Lnext21:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm4_to_abs32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:4, @aa:32
	mov.b	#0xf:4, @byte_dst:32	; 32-bit address-direct operand
;;;	.word	0x6aff
;;;	.long	@byte_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure _ALL_ general regs not disturbed
	test_gr_a5a5 1		; (first, because on h8/300 we must use one
	test_gr_a5a5 2		; to examine the destination memory).
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xf, @byte_dst
	beq	.Lnext22
	fail
.Lnext22:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indirect:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @erd
	mov.l	#byte_dst, er1
	mov.b	#0xa5:8, @er1	; Register indirect operand
;;;	.word	0x017d
;;;	.word	0x01a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext1
	fail
.Lnext1:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_postinc:		; post-increment from imm8 to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @erd+
	mov.l	#byte_dst, er1
	mov.b	#0xa5:8, @er1+	; Imm8, register post-incr operands.
;;;	.word	0x017d
;;;	.word	0x81a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst+1, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext2
	fail
.Lnext2:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_postdec:		; post-decrement from imm8 to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @erd-
	mov.l	#byte_dst, er1
	mov.b	#0xa5:8, @er1-	; Imm8, register post-decr operands.
;;;	.word	0x017d
;;;	.word	0xa1a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-1, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext3
	fail
.Lnext3:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_preinc:		; pre-increment from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @+erd
	mov.l	#byte_dst-1, er1
	mov.b	#0xa5:8, @+er1	; Imm8, register pre-incr operands
;;;	.word	0x017d
;;;	.word	0x91a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext4
	fail
.Lnext4:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_predec:		; pre-decrement from register to mem
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @-erd
	mov.l	#byte_dst+1, er1
	mov.b	#0xa5:8, @-er1	; Imm8, register pre-decr operands
;;;	.word	0x017d
;;;	.word	0xb1a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext5
	fail
.Lnext5:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_disp2:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @(dd:2, erd)
	mov.l	#byte_dst-3, er1
	mov.b	#0xa5:8, @(3:2, er1)	; Imm8, reg plus 2-bit disp. operand
;;;	.word	0x017d
;;;	.word	0x31a5

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-3, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext6
	fail
.Lnext6:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_disp16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @(dd:16, erd)
	mov.l	#byte_dst-4, er1
	mov.b	#0xa5:8, @(4:16, er1)	; Register plus 16-bit disp. operand
;;;	.word	0x017d
;;;	.word	0x6f90
;;;	.word	0x0004

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-4, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext7
	fail
.Lnext7:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_disp32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @(dd:32, erd)
	mov.l	#byte_dst-8, er1
	mov.b	#0xa5:8, @(8:32, er1)	; Register plus 32-bit disp. operand
;;;	.word	0x017d
;;;	.word	0xc9a5
;;;	.long	8

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	byte_dst-8, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	beq	.Lnext8
	fail
.Lnext8:
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexb16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff01, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:16, rd.b)
	mov.b	#0xa5:8, @(byte_dst-1:16, r1.b) ; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0xffffff01, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexw16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0002, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:16, rd.w)
	mov.b	#0xa5:8, @(byte_dst-2:16, r1.w) ; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0xffff0002, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexl16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000003, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:16, erd.l)
	mov.b	#0xa5:8, @(byte_dst-3:16, er1.l) ; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0x00000003, er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexb32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffffff04, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:32, rd.b)
	mov.b	#0xa5:8, @(byte_dst-4:32, r1.b)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0xffffff04 er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexw32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0xffff0005, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:32, rd.w)
	mov.b	#0xa5:8, @(byte_dst-5:32, r1.w)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0xffff0005 er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_indexl32:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	mov.l	#0x00000006, er1
	set_ccr_zero
	;; mov.b #xx:8, @(dd:32, erd.l)
	mov.b	#0xa5:8, @(byte_dst-6:32, er1.l)	; byte indexed operand

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_h_gr32	0x00000006 er1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.b	#0xa5, @byte_dst
	bne	fail1
	mov.b	#0, @byte_dst	; zero it again for the next use.

mov_b_imm8_to_abs16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.b #xx:8, @aa:16
	mov.b	#0xa5:8, @byte_dst:16	; 16-bit address-direct operand
;;;	.word	0x017d
;;;	.word	0x40a5
;;;	.word	@byte_dst

	;; test ccr		; H=0 N=1 Z=0 V=0 C=0
	test_neg_set
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure _ALL_ general regs not disturbed
	test_gr_a5a5 1		; (first, because on h8/300 we must use one
	test_gr_a5a5 2		; to examine the destination memory).
	test_gr_a5a5 3
	test_gr_a5a5 4