movw.s

gdb-6.0 linux 下的调试工具

	test_h_gr32	word_src-2, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

mov_w_preinc_to_reg16:		; pre-increment from mem to register
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @+ers, rd

	mov.l	#word_src-2, er1
	mov.w	@+er1, r0	; Register pre-incr operand
;;;	.word	0x0151
;;;	.word	0x6d10

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0

	test_h_gr32	word_src, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

mov_w_predec_to_reg16:		; pre-decrement from mem to register
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @-ers, rd

	mov.l	#word_src+2, er1
	mov.w	@-er1, r0	; Register pre-decr operand
;;;	.word	0x0153
;;;	.word	0x6d10

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0

	test_h_gr32	word_src, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	
mov_w_disp2_to_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:2, ers), rd
	mov.l	#word_src-2, er1
	mov.w	@(2:2, er1), r0	; Register plus 2-bit disp. operand
;;; 	.word	0x0151
;;; 	.word	0x6910

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0	; mov result:	a5a5 | 7777

	test_h_gr32	word_src-2, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7
.endif

mov_w_disp16_to_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:16, ers), rd
	mov.l	#word_src+0x1234, er1
	mov.w	@(-0x1234:16, er1), r0	; Register plus 16-bit disp. operand
;;;	.word	0x6f10
;;;	.word	-0x1234

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0	; mov result:	a5a5 | 7777

	test_h_gr32	word_src+0x1234, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

mov_w_disp32_to_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:32, ers), rd
	mov.l	#word_src+65536, er1
	mov.w	@(-65536:32, er1), r0	; Register plus 32-bit disp. operand
;;;	.word	0x7810
;;;	.word	0x6b20
;;;	.long	-65536

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0	; mov result:	a5a5 | 7777

	test_h_gr32	word_src+65536, er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

mov_w_abs16_to_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @aa:16, rd
	mov.w	@word_src:16, r0	; 16-bit address-direct operand
;;;	.word	0x6b00
;;;	.word	@word_src

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

mov_w_abs32_to_reg16:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @aa:32, rd
	mov.w	@word_src:32, r0	; 32-bit address-direct operand
;;;	.word	0x6b20
;;;	.long	@word_src

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_h_gr32 0xa5a57777 er0

	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

.if (sim_cpu == h8sx)

	;;
	;; Move word from memory to memory
	;; 

mov_w_indirect_to_indirect:	; reg indirect, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @ers, @erd

	mov.l	#word_src, er1
	mov.l	#word_dst, er0
	mov.w	@er1, @er0
;;;	.word	0x0158
;;;	.word	0x0100

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst er0
	test_h_gr32  word_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext55
	fail
.Lnext55:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext56
	fail
.Lnext56:			; OK, pass on.

mov_w_postinc_to_postinc:	; reg post-increment, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @ers+, @erd+

	mov.l	#word_src, er1
	mov.l	#word_dst, er0
	mov.w	@er1+, @er0+
;;;	.word	0x0158
;;;	.word	0x8180

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst+2 er0
	test_h_gr32  word_src+2 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext65
	fail
.Lnext65:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext66
	fail
.Lnext66:			; OK, pass on.

mov_w_postdec_to_postdec:	; reg post-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @ers-, @erd-

	mov.l	#word_src, er1
	mov.l	#word_dst, er0
	mov.w	@er1-, @er0-
;;;	.word	0x0158
;;;	.word	0xa1a0

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst-2 er0
	test_h_gr32  word_src-2 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext75
	fail
.Lnext75:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext76
	fail
.Lnext76:			; OK, pass on.

mov_w_preinc_to_preinc:		; reg pre-increment, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @+ers, @+erd

	mov.l	#word_src-2, er1
	mov.l	#word_dst-2, er0
	mov.w	@+er1, @+er0
;;;	.word	0x0158
;;;	.word	0x9190

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst er0
	test_h_gr32  word_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext85
	fail
.Lnext85:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext86
	fail
.Lnext86:				; OK, pass on.

mov_w_predec_to_predec:		; reg pre-decrement, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @-ers, @-erd

	mov.l	#word_src+2, er1
	mov.l	#word_dst+2, er0
	mov.w	@-er1, @-er0
;;;	.word	0x0158
;;;	.word	0xb1b0

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst er0
	test_h_gr32  word_src er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext95
	fail
.Lnext95:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext96
	fail
.Lnext96:			; OK, pass on.

mov_w_disp2_to_disp2:		; reg 2-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:2, ers), @(dd:2, erd)

	mov.l	#word_src-2, er1
	mov.l	#word_dst-4, er0
	mov.w	@(2:2, er1), @(4:2, er0)
;;; 	.word	0x0158
;;; 	.word	0x1120

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst-4 er0
	test_h_gr32  word_src-2 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext105
	fail
.Lnext105:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext106
	fail
.Lnext106:			; OK, pass on.

mov_w_disp16_to_disp16:		; reg 16-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:16, ers), @(dd:16, erd)

	mov.l	#word_src-1, er1
	mov.l	#word_dst-2, er0
	mov.w	@(1:16, er1), @(2:16, er0)
;;; 	.word	0x0158
;;; 	.word	0xc1c0
;;; 	.word	0x0001
;;; 	.word	0x0002

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst-2 er0
	test_h_gr32  word_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext115
	fail
.Lnext115:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext116
	fail
.Lnext116:			; OK, pass on.

mov_w_disp32_to_disp32:		; reg 32-bit disp, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @(dd:32, ers), @(dd:32, erd)

	mov.l	#word_src-1, er1
	mov.l	#word_dst-2, er0
	mov.w	@(1:32, er1), @(2:32, er0)
;;; 	.word	0x0158
;;; 	.word	0xc9c8
;;;	.long	1
;;;	.long	2

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	;; Verify the affected registers.

	test_h_gr32  word_dst-2 er0
	test_h_gr32  word_src-1 er1
	test_gr_a5a5 2		; Make sure other general regs not disturbed
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext125
	fail
.Lnext125:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext126
	fail
.Lnext126:				; OK, pass on.

mov_w_abs16_to_abs16:		; 16-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @aa:16, @aa:16

	mov.w	@word_src:16, @word_dst:16
;;; 	.word	0x0158
;;; 	.word	0x4040
;;;	.word	@word_src
;;;	.word	@word_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear


	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext135
	fail
.Lnext135:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext136
	fail
.Lnext136:				; OK, pass on.

mov_w_abs32_to_abs32:		; 32-bit absolute addr, memory to memory
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	set_ccr_zero

	;; mov.w @aa:32, @aa:32

	mov.w	@word_src:32, @word_dst:32
;;; 	.word	0x0158
;;; 	.word	0x4848
;;;	.long	@word_src
;;;	.long	@word_dst

	;; test ccr		; H=0 N=0 Z=0 V=0 C=0
	test_neg_clear
	test_zero_clear
	test_ovf_clear
	test_carry_clear

	test_gr_a5a5 0		; Make sure *NO* general registers are changed
	test_gr_a5a5 1
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	;; Now check the result of the move to memory.
	cmp.w	@word_src, @word_dst
	beq	.Lnext145
	fail
.Lnext145:
	;; Now clear the destination location, and verify that.
	mov.w	#0, @word_dst
	cmp.w	@word_src, @word_dst
	bne	.Lnext146
	fail
.Lnext146:				; OK, pass on.


.endif

	pass

	exit 0