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📁 gdb-6.0 linux 下的调试工具
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	problem isn't really specific to Unixware.	(OLDGCC_COMPAT): Define.	(i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with	destination %st(0).	Fix lots of comments.2000-03-02  J"orn Rennecke <amylaar@cygnus.co.uk>	* d30v.h:	(SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.	(SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.	(SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.	(SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.	(SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.	(LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.	(LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.2000-02-25  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h (fild, fistp): Change intel d_Suf form to fildd and	fistpd without suffix.2000-02-24  Nick Clifton  <nickc@cygnus.com>	* cgen.h (cgen_cpu_desc): Rename field 'flags' to	'signed_overflow_ok_p'.	Delete prototypes for cgen_set_flags() and cgen_get_flags().2000-02-24  Andrew Haley  <aph@cygnus.com>	* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.	(CGEN_CPU_TABLE): flags: new field.	Add prototypes for new functions.2000-02-24  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Add some more UNIXWARE_COMPAT comments.2000-02-23  Linas Vepstas <linas@linas.org>	* i370.h: New file.2000-02-22  Chandra Chavva  <cchavva@cygnus.com>	* d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation	cannot be combined in parallel with ADD/SUBppp.2000-02-22  Andrew Haley  <aph@cygnus.com>	* mips.h: (OPCODE_IS_MEMBER): Add comment.1999-12-30  Andrew Haley  <aph@cygnus.com>	* mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines	whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit	insns.2000-01-15  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Qualify intel mode far call and jmp with x_Suf.1999-12-27  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Add JumpAbsolute qualifier to all non-intel mode	indirect jumps and calls.  Add FF/3 call for intel mode.Wed Dec  1 03:05:25 1999  Jeffrey A Law  (law@cygnus.com)	* mn10300.h: Add new operand types.  Add new instruction formats.Wed Nov 24 20:28:58 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"	instruction.1999-11-18  Gavin Romig-Koch  <gavin@cygnus.com>	* mips.h (INSN_ISA5): New.1999-11-01  Gavin Romig-Koch  <gavin@cygnus.com>	* mips.h (OPCODE_IS_MEMBER): New.1999-10-29  Nick Clifton  <nickc@cygnus.com>	* d30v.h (SHORT_AR): Define.1999-10-18  Michael Meissner  <meissner@cygnus.com>	* alpha.h (alpha_num_opcodes): Convert to unsigned.	(alpha_num_operands): Ditto.Sun Oct 10 01:46:56 1999  Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>	* hppa.h (pa_opcodes): Add load and store cache control to	instructions.  Add ordered access load and store.	* hppa.h (pa_opcode): Add new entries for addb and addib.	* hppa.h (pa_opcodes): Fix cmpb and cmpib entries.	* hppa.h (pa_opcodes): Add entries for cmpb and cmpib.Thu Oct  7 00:12:25 MDT 1999	Diego Novillo <dnovillo@cygnus.com>	* d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.Thu Sep 23 07:08:38 1999  Jerry Quinn <jquinn@nortelnetworks.com>	* hppa.h (pa_opcodes): Add "call" and "ret".  Clean up "b", "bve"	and "be" using completer prefixes.	* hppa.h (pa_opcodes): Add initializers to silence compiler.	* hppa.h: Update comments about character usage.Mon Sep 20 03:55:31 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning	up the new fstw & bve instructions.Sun Sep 19 10:40:59 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store	instructions.	* hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.	* hppa.h (pa_opcodes): Add long offset double word load/store	instructions.	* hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and	stores.	* hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.	* hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.	* hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.	* hppa.h (pa_opcodes): Add new syntax "be" instructions.	* hppa.h (pa_opcodes): Note use of 'M' and 'L'.	* hppa.h (pa_opcodes): Add support for "b,l".	* hppa.h (pa_opcodes): Add support for "b,gate".Sat Sep 18 11:41:16 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Use 'fX' for first register operand	in xmpyu.	* hppa.h (pa_opcodes): Fix mask for probe and probei.	* hppa.h (pa_opcodes): Fix mask for depwi.Tue Sep  7 13:44:25 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as	an explicit output argument.Mon Sep  6 04:41:42 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.	Add a few PA2.0 loads and store variants.1999-09-04  Steve Chamberlain  <sac@pobox.com>	* pj.h: New file.1999-08-29  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h (i386_regtab): Move %st to top of table, and split off	other fp reg entries.	(i386_float_regtab): To here.Sat Aug 28 00:25:25 1999  Jerry Quinn <jquinn@nortelnetworks.com>	* hppa.h (pa_opcodes): Replace 'f' by 'v'.  Prefix float register args	by 'f'.	* hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.	Add supporting args.	* hppa.h: Document new completers and args.	* hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,	uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe.  Add pa2.0	extensions for ssm, rsm, pdtlb, pitlb.  Add performance instructions	pmenb and pmdis.	* hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,	hshr, hsub, mixh, mixw, permh.	* hppa.h (pa_opcodes): Change completers in instructions to	use 'c' prefix.	* hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,	hshladd, hshradd, shrpd, and shrpw instructions.  Update arg comments.	* hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,	fnegabs to use 'I' instead of 'F'.1999-08-21  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.	Document pf2iw and pi2fw as athlon insns.  Remove pswapw.	Alphabetically sort PIII insns.Wed Aug 18 18:14:40 1999  Doug Evans  <devans@canuck.cygnus.com>	* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.Fri Aug  6 09:46:35 1999  Jerry Quinn <jquinn@nortelnetworks.com>	* hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,	and andcm.  Add 32 and 64 bit version of cmpclr, cmpiclr.	* hppa.h: Document 64 bit condition completers.Thu Aug  5 16:56:07 1999  Jerry Quinn <jquinn@nortelnetworks.com>	* hppa.h (pa_opcodes): Change condition args to use '?' prefix.1999-08-04  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h (i386_optab): Add DefaultSize modifier to all insns	that implicitly modify %esp.  #undef d_Suf, x_suf, sld_suf,	sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.Wed Jul 28 02:04:24 1999  Jerry Quinn <jquinn@nortelnetworks.com>			  Jeff Law <law@cygnus.com>	* hppa.h (pa_opcodes): Add "pushnom" and "pushbts".	* hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.	* hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,	and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.1999-07-13  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.Thu Jul  1 00:17:24 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (struct pa_opcode): Add new field "flags".	(FLAGS_STRICT): Define.Fri Jun 25 04:22:04 1999  Jerry Quinn <jquinn@nortelnetworks.com>			  Jeff Law <law@cygnus.com>	* hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.	* hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.1999-06-23  Alan Modra  <alan@spri.levels.unisa.edu.au>	* i386.h: Allow `l' suffix on bswap.  Allow `w' suffix on arpl,	lldt, lmsw, ltr, str, verr, verw.  Add FP flag to fcmov*.  Add FP	flag to fcomi and friends.Fri May 28 15:26:11 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Move integer arithmetic instructions after	integer logical instructions.1999-05-28  Linus Nordberg  <linus.nordberg@canit.se>	* m68k.h: Document new formats `E', `G', `H' and new places `N',	`n', `o'.	* m68k.h: Define mcf5206e, mcf5307, mcf.  Document new format `u'	and new places `m', `M', `h'.Thu May 27 04:13:54 1999  Joel Sherrill (joel@OARcorp.com	* hppa.h (pa_opcodes): Add several processor specific system	instructions.Wed May 26 16:57:44 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (pa_opcodes): Add second entry for "comb", "comib",	"addb", and "addib" to be used by the disassembler.1999-05-12  Alan Modra  <alan@apri.levels.unisa.edu.au>	* i386.h (ReverseModrm): Remove all occurences.	(InvMem): Add to control/debug/test mov insns, movhlps, movlhps,	movmskps, pextrw, pmovmskb, maskmovq.	Change NoSuf to FP on all MMX, XMM and AMD insns as these all	ignore the data size prefix.	* i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.	Mostly stolen from Doug Ledford <dledford@redhat.com>Sat May  8 23:27:35 1999  Richard Henderson  <rth@cygnus.com>	* ppc.h (PPC_OPCODE_64_BRIDGE): New.1999-04-14  Doug Evans  <devans@casey.cygnus.com>	* cgen.h (CGEN_ATTR): Delete member num_nonbools.	(CGEN_ATTR_TYPE): Update.	(CGEN_ATTR_MASK): Number booleans starting at 0.	(CGEN_ATTR_VALUE): Update.	(CGEN_INSN_ATTR): Update.Mon Apr 12 23:43:27 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0	instructions.Tue Mar 23 11:24:38 1999  Jeffrey A Law  (law@cygnus.com)	* hppa.h (bb, bvb): Tweak opcode/mask.1999-03-22  Doug Evans  <devans@casey.cygnus.com>	* cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.	(struct cgen_cpu_desc): Rename member mach to machs.  New member isas.	New members word_bitsize,default_insn_bitsize,base_insn-bitsize,	min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.	Delete member max_insn_size.	(enum cgen_cpu_open_arg): New enum.	(cpu_open): Update prototype.	(cpu_open_1): Declare.	(cgen_set_cpu): Delete.1999-03-11  Doug Evans  <devans@casey.cygnus.com>	* cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.	(CGEN_OPERAND_NIL): New macro.	(CGEN_OPERAND): New member `type'.	(@arch@_cgen_operand_table): Delete decl.	(CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.	(CGEN_OPERAND_TABLE): New struct.	(cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.	(CGEN_OPINST): Pointer to operand table entry replaced with enum.	(CGEN_CPU_TABLE): New member `isa'.  Change member `operand_table',	now a CGEN_OPERAND_TABLE.  Add CGEN_CPU_DESC arg to	{get,set}_{int,vma}_operand.	(@arch@_cgen_cpu_open): New arg `isa'.	(cgen_set_cpu): Ditto.Fri Feb 26 02:36:45 1999  Richard Henderson  <rth@cygnus.com>	* i386.h: Fill in cmov and fcmov alternates.  Add fcomi short forms.1999-02-25  Doug Evans  <devans@casey.cygnus.com>	* cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.	(CGEN_HW_ENTRY): Delete member `next'.  Change type of `type' to	enum cgen_hw_type.	(CGEN_HW_TABLE): New struct.	(hw_table): Delete declaration.	(CGEN_OPERAND): Change member hw to hw_type, change type from pointer	to table entry to enum.	(CGEN_OPINST): Ditto.	(CGEN_CPU_TABLE): Change member hw_list to hw_table.Sat Feb 13 14:13:44 1999  Richard Henderson  <rth@cygnus.com>	* alpha.h (AXP_OPCODE_EV6): New.	(AXP_OPCODE_NOPAL): Include it.1999-02-09  Doug Evans  <devans@casey.cygnus.com>	* cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.	All uses updated.  New members int_insn_p, max_insn_size,	parse_operand,insert_operand,extract_operand,print_operand,	sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,	get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,	extract_handlers,print_handlers.	(CGEN_ATTR): Change type of num_nonbools to unsigned int.	(CGEN_ATTR_BOOL_OFFSET): New macro.	(CGEN_ATTR_MASK): Subtract it to compute bit number.	(CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.	(cgen_opcode_handler): Renamed from cgen_base.	(CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.	(CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,	all uses updated.	(CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.	(enum cgen_opinst_type): Renamed from cgen_operand_instance_type.	(CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.	(CGEN_OPCODE,CGEN_IBASE): New types.	(CGEN_INSN): Rewrite.	(CGEN_{ASM,DIS}_HASH*): Delete.	(init_opcode_table,init_ibld_table): Declare.	(CGEN_INSN_ATTR): New type.Mon Feb  1 21:09:14 1999  Catherine Moore  <clm@cygnus.com>	* i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.	(x_FP, d_FP, dls_FP, sldx_FP): Define.	Change *Suf definitions to include x and d suffixes.	(movsx): Use w_Suf and b_Suf.	(movzx): Likewise.	(movs): Use bwld_Suf.	(fld): Change ordering.  Use sld_FP.	(fild): Add Intel Syntax equivalent of fildq.	(fst): Use sld_FP.	(fist): Use sld_FP.	(fstp): Use sld_FP.  Add x_FP version.	(fistp): LLongMem version for Intel Syntax.	(fcom, fcomp): Use sld_FP.	(fadd, fiadd, fsub): Use sld_FP.	(fsubr): Use sld_FP.	(fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.1999-01-27  Doug Evans  <devans@casey.cygnus.com>

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