a29k.h

gcc-2.95.3 Linux下最常用的C编译器

   The trampoline should set the static chain pointer to value placed
   into the trampoline and should branch to the specified routine.  We
   use gr121 (tav) as a temporary.  */

#define TRAMPOLINE_TEMPLATE(FILE)			\
{							\
  fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]);	\
  fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]);	\
  fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]);	\
  fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]);	\
  fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]);	\
}

/* Length in units of the trampoline for entering a nested function.  */

#define TRAMPOLINE_SIZE    20

/* Emit RTL insns to initialize the variable parts of a trampoline.
   FNADDR is an RTX for the address of the function's pure code.
   CXT is an RTX for the static chain value for the function.

   We do this on the 29k by writing the bytes of the addresses into the
   trampoline one byte at a time.  */

#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)			\
{									\
  INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4);			\
  INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16);			\
}

/* Define a sub-macro to initialize one value into the trampoline.
   We specify the offsets of the CONST and CONSTH instructions, respectively
   and copy the value a byte at a time into these instructions.  */

#define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH)	\
{									\
  rtx _addr, _temp;							\
  rtx _val = force_reg (SImode, VALUE);					\
									\
  _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3));	\
  emit_move_insn (gen_rtx (MEM, QImode, _addr),				\
		  gen_lowpart (QImode, _val));				\
									\
  _temp = expand_shift (RSHIFT_EXPR, SImode, _val,			\
		       build_int_2 (8, 0), 0, 1);			\
  _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1));	\
  emit_move_insn (gen_rtx (MEM, QImode, _addr),				\
		  gen_lowpart (QImode, _temp));				\
									\
  _temp = expand_shift (RSHIFT_EXPR, SImode, _temp,			\
		       build_int_2 (8, 0), _temp, 1);			\
  _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3));	\
  emit_move_insn (gen_rtx (MEM, QImode, _addr),				\
		  gen_lowpart (QImode, _temp));				\
									\
  _temp = expand_shift (RSHIFT_EXPR, SImode, _temp,			\
		       build_int_2 (8, 0), _temp, 1);			\
  _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1));	\
  emit_move_insn (gen_rtx (MEM, QImode, _addr),				\
		  gen_lowpart (QImode, _temp));				\
}

/* Addressing modes, and classification of registers for them.  */

/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */

/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */

/* Macros to check register numbers against specific register classes.  */

/* These assume that REGNO is a hard or pseudo reg number.
   They give nonzero only if REGNO is a hard reg of the suitable class
   or a pseudo reg currently allocated to a suitable hard reg.
   Since they use reg_renumber, they are safe only once reg_renumber
   has been allocated, which happens in local-alloc.c.  */

#define REGNO_OK_FOR_INDEX_P(REGNO) 0
#define REGNO_OK_FOR_BASE_P(REGNO) 1

/* Given the value returned from get_frame_size, compute the actual size
   of the frame we will allocate.   We include the pretend and outgoing
   arg sizes and round to a doubleword.  */

#define ACTUAL_FRAME_SIZE(SIZE)				\
  (((SIZE) + current_function_pretend_args_size		\
    + current_function_outgoing_args_size + 7) & ~7)

/* Define the initial offset between the frame and stack pointer.  */

#define INITIAL_FRAME_POINTER_OFFSET(DEPTH)	\
  (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ())

/* Maximum number of registers that can appear in a valid memory address.  */
#define MAX_REGS_PER_ADDRESS 1

/* Recognize any constant value that is a valid address.  */

#define CONSTANT_ADDRESS_P(X)  \
(GET_CODE (X) == CONST_INT && (unsigned) INTVAL (X) < 0x100)

/* Include all constant integers and constant doubles */
#define LEGITIMATE_CONSTANT_P(X)	1

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
   and check its validity for a certain class.
   We have two alternate definitions for each of them.
   The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.
   The symbol REG_OK_STRICT causes the latter definition to be used.

   Most source files want to accept pseudo regs in the hope that
   they will get allocated to the class that the insn wants them to be in.
   Source files for reload pass need to be strict.
   After reload, it makes no difference, since pseudo regs have
   been eliminated by then.  */

#ifndef REG_OK_STRICT

/* Nonzero if X is a hard reg that can be used as an index
   or if it is a pseudo reg.  */
#define REG_OK_FOR_INDEX_P(X) 0
/* Nonzero if X is a hard reg that can be used as a base reg
   or if it is a pseudo reg.  */
#define REG_OK_FOR_BASE_P(X)  1

#else

/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))

#endif

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
   that is a valid memory address for an instruction.
   The MODE argument is the machine mode for the MEM expression
   that wants to use this address.

   On the 29k, a legitimate address is a register and so is a
   constant of less than 256.  */

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)  \
{ if (REG_P (X) && REG_OK_FOR_BASE_P (X))	\
    goto ADDR;					\
  if (GET_CODE (X) == CONST_INT			\
      && (unsigned) INTVAL (X) < 0x100)		\
    goto ADDR;					\
}

/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.

   For the 29k, we need not do anything.  However, if we don't,
   `memory_address' will try lots of things to get a valid address, most of
   which will result in dead code and extra pseudos.  So we make the address
   valid here.

   This is easy:  The only valid addresses are an offset from a register
   and we know the address isn't valid.  So just call either `force_operand'
   or `force_reg' unless this is a (plus (reg ...) (const_int 0)).  */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)			\
{ if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx)	\
    X = XEXP (x, 0);						\
  if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS)		\
    X = force_operand (X, 0);					\
  else								\
    X = force_reg (Pmode, X);					\
  goto WIN;							\
}

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.
   On the 29k this is never true.  */

#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)

/* Compute the cost of an address.  For the 29k, all valid addresses are
   the same cost.  */

#define ADDRESS_COST(X)  0

/* Define this if some processing needs to be done immediately before
   emitting code for an insn.  */

/* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */

/* Specify the machine mode that this machine uses
   for the index in the tablejump instruction.  */
#define CASE_VECTOR_MODE SImode

/* Define as C expression which evaluates to nonzero if the tablejump
   instruction expects the table to contain offsets from the address of the
   table.
   Do not define this if the table should contain absolute addresses. */
/* #define CASE_VECTOR_PC_RELATIVE 1 */

/* Specify the tree operation to be used to convert reals to integers.  */
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR

/* This is the kind of divide that is easiest to do in the general case.  */
#define EASY_DIV_EXPR TRUNC_DIV_EXPR

/* Define this as 1 if `char' should by default be signed; else as 0.  */
#define DEFAULT_SIGNED_CHAR 0

/* This flag, if defined, says the same insns that convert to a signed fixnum
   also convert validly to an unsigned one.

   We actually lie a bit here as overflow conditions are different.  But
   they aren't being checked anyway.  */

#define FIXUNS_TRUNC_LIKE_FIX_TRUNC

/* Max number of bytes we can move to of from memory
   in one reasonably fast instruction.

   For the 29k, we will define movti, so put this at 4 words.  */
#define MOVE_MAX 16

/* Largest number of bytes of an object that can be placed in a register.
   On the 29k we have plenty of registers, so use TImode.  */
#define MAX_FIXED_MODE_SIZE	GET_MODE_BITSIZE (TImode)

/* Nonzero if access to memory by bytes is no faster than for words.
   Also non-zero if doing byte operations (specifically shifts) in registers
   is undesirable. 

   On the 29k, large masks are expensive, so we want to use bytes to
   manipulate fields.  */
#define SLOW_BYTE_ACCESS	0

/* Define if operations between registers always perform the operation
   on the full register even if a narrower mode is specified.  */
#define WORD_REGISTER_OPERATIONS

/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
   will either zero-extend or sign-extend.  The value of this macro should
   be the code that says which one of the two operations is implicitly
   done, NIL if none.  */
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND

/* Define if the object format being used is COFF or a superset.  */
#define OBJECT_FORMAT_COFF

/* This uses COFF, so it wants SDB format.  */
#define SDB_DEBUGGING_INFO

/* Define this to be the delimiter between SDB sub-sections.  The default
   is ";".  */
#define SDB_DELIM	"\n"

/* Do not break .stabs pseudos into continuations.  */
#define DBX_CONTIN_LENGTH 0

/* Don't try to use the `x' type-cross-reference character in DBX data.
   Also has the consequence of putting each struct, union or enum
   into a separate .stabs, containing only cross-refs to the others.  */
#define DBX_NO_XREFS

/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
   is done just by pretending it is already truncated.  */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1

/* We assume that the store-condition-codes instructions store 0 for false
   and some other value for true.  This is the value stored for true, which
   is just the sign bit.  */

#define STORE_FLAG_VALUE (-2147483647 - 1)

/* Specify the machine mode that pointers have.
   After generation of rtl, the compiler makes no further distinction
   between pointers and any other objects of this machine mode.  */
#define Pmode SImode

/* Mode of a function address in a call instruction (for indexing purposes).

   Doesn't matter on 29k.  */
#define FUNCTION_MODE SImode

/* Define this if addresses of constant functions
   shouldn't be put through pseudo regs where they can be cse'd.
   Desirable on machines where ordinary constants are expensive
   but a CALL with constant address is cheap.  */
#define NO_FUNCTION_CSE

/* Define this to be nonzero if shift instructions ignore all but the low-order
   few bits. */
#define SHIFT_COUNT_TRUNCATED 1

/* Compute the cost of computing a constant rtl expression RTX
   whose rtx-code is CODE.  The body of this macro is a portion
   of a switch statement.  If the code is computed here,
   return it with a return statement.  Otherwise, break from the switch.

   We only care about the cost if it is valid in an insn.  The only
   constants that cause an insn to generate more than one machine
   instruction are those involving floating-point or address.  So 
   only these need be expensive.  */

#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
  case CONST_INT:						\
    return 0;							\
  case CONST:							\
  case LABEL_REF:						\
  case SYMBOL_REF:						\
    return 6;							\
  case CONST_DOUBLE:						\
    return GET_MODE (RTX) == SFmode ? 6 : 8;
    
/* Provide the costs of a rtl expression.  This is in the body of a
   switch on CODE.

   All MEMs cost the same if they are valid.  This is used to ensure
   that (mem (symbol_ref ...)) is placed into a CALL when valid.

   The multiply cost depends on whether this is a 29050 or not.  */

#define RTX_COSTS(X,CODE,OUTER_CODE)			\
  case MULT:						\
    return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40);  \
  case DIV:						\