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📄 h8300.md

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;; ----------------------------------------------------------------------;; NOT INSTRUCTIONS;; ----------------------------------------------------------------------(define_insn "one_cmplqi2"  [(set (match_operand:QI 0 "register_operand" "=r")	(not:QI (match_operand:QI 1 "general_operand" "0")))]  ""  "not	%X0"  [(set_attr "length" "2")   (set_attr "cc" "set_znv")])(define_insn "one_cmplhi2"  [(set (match_operand:HI 0 "register_operand" "=r")	(not:HI (match_operand:HI 1 "general_operand" "0")))]  ""  "*{  if (TARGET_H8300)    return \"not	%s0\;not	%t0\";  else    return \"not	%T0\";}"  [(set_attr "cc" "clobber")   (set (attr "length")	(if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")			  (const_int 0))		      (const_int 4)		      (const_int 2)))])(define_insn "one_cmplsi2"  [(set (match_operand:SI 0 "register_operand" "=r")	(not:SI (match_operand:SI 1 "general_operand" "0")))]  ""  "*{  if (TARGET_H8300)    return \"not	%w0\;not	%x0\;not	%y0\;not	%z0\";  else    return \"not	%S0\";}"  [(set_attr "cc" "clobber")   (set (attr "length")	(if_then_else (eq (symbol_ref "TARGET_H8300H || TARGET_H8300S")			  (const_int 0))		      (const_int 8)		      (const_int 2)))])			;; ----------------------------------------------------------------------;; JUMP INSTRUCTIONS;; ----------------------------------------------------------------------;; Conditional jump instructions(define_expand "ble"  [(set (pc)	(if_then_else (le (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bleu"  [(set (pc)	(if_then_else (leu (cc0)			   (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bge"  [(set (pc)	(if_then_else (ge (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bgeu"  [(set (pc)	(if_then_else (geu (cc0)			   (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "blt"  [(set (pc)	(if_then_else (lt (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bltu"  [(set (pc)	(if_then_else (ltu (cc0)			   (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bgt"  [(set (pc)	(if_then_else (gt (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bgtu"  [(set (pc)	(if_then_else (gtu (cc0)			   (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "beq"  [(set (pc)	(if_then_else (eq (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_expand "bne"  [(set (pc)	(if_then_else (ne (cc0)			  (const_int 0))		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "")(define_insn "branch_true"  [(set (pc)	(if_then_else (match_operator 1 "comparison_operator"				      [(cc0) (const_int 0)])		      (label_ref (match_operand 0 "" ""))		      (pc)))]  ""  "*{  if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0      && (GET_CODE (operands[1]) == GT          || GET_CODE (operands[1]) == GE          || GET_CODE (operands[1]) == LE          || GET_CODE (operands[1]) == LT))    {      cc_status.flags &= ~CC_OVERFLOW_UNUSABLE;      return 0;    }  if (get_attr_length (insn) == 2)     return \"b%j1	%l0\";  else if (get_attr_length (insn) == 4)     return \"b%j1	%l0:16\";  else    return \"b%k1	.Lh8BR%=\;jmp	@%l0\\n.Lh8BR%=:\";}"  [(set_attr "type" "branch")   (set_attr "cc" "none")])(define_insn "branch_false"  [(set (pc)	(if_then_else (match_operator 1 "comparison_operator"				      [(cc0) (const_int 0)])		      (pc)		      (label_ref (match_operand 0 "" ""))))]  ""  "*{  if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0      && (GET_CODE (operands[1]) == GT          || GET_CODE (operands[1]) == GE          || GET_CODE (operands[1]) == LE          || GET_CODE (operands[1]) == LT))    {      cc_status.flags &= ~CC_OVERFLOW_UNUSABLE;      return 0;    }  if (get_attr_length (insn) == 2)     return \"b%k1	%l0\";  else if (get_attr_length (insn) == 4)     return \"b%k1	%l0:16\";  else    return \"b%j1	.Lh8BR%=\;jmp	@%l0\\n.Lh8BR%=:\";}"  [(set_attr "type" "branch")   (set_attr "cc" "none")]);; Unconditional and other jump instructions.(define_insn "jump"  [(set (pc)	(label_ref (match_operand 0 "" "")))]  ""  "*{  if (get_attr_length (insn) == 2)    return \"bra	%l0\";  else if (get_attr_length (insn) == 4)    return \"bra	%l0:16\";  else    return \"jmp	@%l0\";}"  [(set_attr "type" "branch")   (set_attr "cc" "none")]);; This is a define expand, because pointers may be either 16 or 32 bits.(define_expand "tablejump"  [(parallel [(set (pc) (match_operand 0 "register_operand" "r"))	      (use (label_ref (match_operand 1 "" "")))])]  ""  "")(define_insn "tablejump_h8300"  [(set (pc) (match_operand:HI 0 "register_operand" "r"))   (use (label_ref (match_operand 1 "" "")))]  "TARGET_H8300"  "jmp	@%0"  [(set_attr "cc" "none")   (set_attr "length" "2")])(define_insn "tablejump_h8300h"  [(set (pc) (match_operand:SI 0 "register_operand" "r"))   (use (label_ref (match_operand 1 "" "")))]  "TARGET_H8300H || TARGET_H8300S"  "jmp	@%0"  [(set_attr "cc" "none")   (set_attr "length" "2")]);; This is a define expand, because pointers may be either 16 or 32 bits.(define_expand "indirect_jump"  [(set (pc) (match_operand 0 "jump_address_operand" ""))]  ""  "")(define_insn "indirect_jump_h8300"  [(set (pc) (match_operand:HI 0 "jump_address_operand" "Vr"))]  "TARGET_H8300"  "jmp	@%0"  [(set_attr "cc" "none")   (set_attr "length" "2")])(define_insn "indirect_jump_h8300h"  [(set (pc) (match_operand:SI 0 "jump_address_operand" "Vr"))]  "TARGET_H8300H || TARGET_H8300S"  "jmp @%0"  [(set_attr "cc" "none")   (set_attr "length" "2")]);; Call subroutine with no return value.;; ??? Even though we use HImode here, this works for the 300h.(define_insn "call"  [(call (match_operand:QI 0 "call_insn_operand" "or")	 (match_operand:HI 1 "general_operand" "g"))]  ""  "*{  if (GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF      && SYMBOL_REF_FLAG (XEXP (operands[0], 0)))    return \"jsr\\t\@%0:8\";  else    return \"jsr\\t%0\";}"  [(set_attr "cc" "clobber")   (set (attr "length")     (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")		   (const_int 4)		   (const_int 8)))]);; Call subroutine, returning value in operand 0;; (which must be a hard register).;; ??? Even though we use HImode here, this works on the 300h.(define_insn "call_value"  [(set (match_operand 0 "" "=r")	(call (match_operand:QI 1 "call_insn_operand" "or")	      (match_operand:HI 2 "general_operand" "g")))]  ""  "*{  if (GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF      && SYMBOL_REF_FLAG (XEXP (operands[1], 0)))    return \"jsr\\t\@%1:8\";  else    return \"jsr\\t%1\";}"  [(set_attr "cc" "clobber")   (set (attr "length")     (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")		   (const_int 4)		   (const_int 8)))])(define_insn "nop"  [(const_int 0)]  ""  "nop"  [(set_attr "cc" "none")   (set_attr "length" "2")]);; ----------------------------------------------------------------------;; EXTEND INSTRUCTIONS;; ----------------------------------------------------------------------(define_insn "zero_extendqihi2"  [(set (match_operand:HI 0 "register_operand" "=r,r")	(zero_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))]  ""  "@  mov.b	#0,%t0  mov.b	%R1,%s0\;mov.b	#0,%t0"  [(set_attr "length" "2,4")   (set_attr "cc" "clobber,clobber")]);; The compiler can synthesize a 300H variant of this which is;; just as efficient as one that we'd create(define_insn "zero_extendqisi2"  [(set (match_operand:SI 0 "register_operand" "=r,r")	(zero_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]  "TARGET_H8300"  "@  mov.b	#0,%x0\;sub.w %e0,%e0  mov.b	%R1,%w0\;mov.b	#0,%x0\;sub.w %e0,%e0"  [(set_attr "length" "4,6")   (set_attr "cc" "clobber,clobber")])(define_expand "zero_extendhisi2"  [(set (match_operand:SI 0 "register_operand" "")	(zero_extend:SI (match_operand:HI 1 "register_operand" "")))]  ""  "{  if (TARGET_H8300      && GET_CODE (operands[1]) != CONST_INT      && !optimize)    {      emit_insn (gen_zero_extendhisi2_h8300 (operands[0], operands[1]));      DONE;    }}");; This is used when not optimizing.  It avoids severe code explosion;; due to poor register allocation.(define_expand "zero_extendhisi2_h8300"  [(set (reg:HI 1) (match_operand:HI 1 "general_operand" ""))   (set (reg:SI 0) (zero_extend:SI (reg:HI 1)))   (set (match_operand:SI 0 "general_operand" "" ) (reg:SI 0))]  "TARGET_H8300"  "");; %e prints the high part of a CONST_INT, not the low part.  Arggh.(define_insn ""  [(set (match_operand:SI 0 "register_operand" "=r,r,r")	(zero_extend:SI (match_operand:HI 1 "general_operand_src" "0,i,g>")))]  "TARGET_H8300"  "@  sub.w	%e0,%e0  mov.w %f1,%f0\;sub.w %e0,%e0  mov.w %e1,%f0\;sub.w %e0,%e0"  [(set_attr "length" "2,4,4")   (set_attr "cc" "clobber,clobber,clobber")])(define_insn ""  [(set (match_operand:SI 0 "register_operand" "=r")	(zero_extend:SI (match_operand:HI 1 "register_operand" "0")))]  "TARGET_H8300H || TARGET_H8300S"  "extu.l	%S0"  [(set_attr "length" "2")   (set_attr "cc" "set_znv")])(define_expand "extendqihi2"  [(set (match_operand:HI 0 "register_operand" "")	(sign_extend:HI (match_operand:QI 1 "register_operand" "")))]  ""  "")(define_insn ""  [(set (match_operand:HI 0 "register_operand" "=r,r")	(sign_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))]  "TARGET_H8300"  "@  bld	#7,%s0\;subx	%t0,%t0  mov.b	%R1,%s0\;bld	#7,%s0\;subx	%t0,%t0"  [(set_attr "length" "4,6")   (set_attr "cc" "clobber,clobber")])(define_insn ""  [(set (match_operand:HI 0 "register_operand" "=r")	(sign_extend:HI (match_operand:QI 1 "register_operand" "0")))]  "TARGET_H8300H || TARGET_H8300S"  "exts.w	%T0"  [(set_attr "length" "2")   (set_attr "cc" "set_znv")]);; The compiler can synthesize a 300H variant of this which is;; just as efficient as one that we'd create(define_insn "extendqisi2"  [(set (match_operand:SI 0 "register_operand" "=r,r")	(sign_extend:SI (match_operand:QI 1 "general_operand_src" "0,g>")))]  "TARGET_H8300"  "@  bld	#7,%w0\;subx	%x0,%x0\;subx	%y0,%y0\;subx	%z0,%z0  mov.b %R1,%w0\;bld	#7,%w0\;subx	%x0,%x0\;subx	%y0,%y0\;subx	%z0,%z0"  [(set_attr "length" "8,10")   (set_attr "cc" "clobber,clobber")])(define_expand "extendhisi2"  [(set (match_operand:SI 0 "register_operand" "")	(sign_extend:SI (match_operand:HI 1 "register_operand" "")))]  ""  "{  if (TARGET_H8300      && GET_CODE (operands[1]) != CONST_INT      && !optimize)    {      emit_insn (gen_extendhisi2_h8300 (operands[0], operands[1]));      DONE;    }}");; This is used when not optimizing.  It avoids severe code explosion;; due to poor register allocation.

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