📄 alpha.h
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/* Definitions of target machine for GNU compiler, for DEC Alpha. Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)This file is part of GNU CC.GNU CC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GNU CC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GNU CC; see the file COPYING. If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA. *//* Write out the correct language type definition for the header files. Unless we have assembler language, write out the symbols for C. */#define CPP_SPEC "\%{!undef:\%{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\%{.cc|.cxx|.C:-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus }\%{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\%{!.S:%{!.cc:%{!.cxx:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}\%{mieee:-D_IEEE_FP }\%{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\%(cpp_cpu) %(cpp_subtarget)"#ifndef CPP_SUBTARGET_SPEC#define CPP_SUBTARGET_SPEC ""#endif/* Set the spec to use for signed char. The default tests the above macro but DEC's compiler can't handle the conditional in a "constant" operand. */#define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"#define WORD_SWITCH_TAKES_ARG(STR) \ (!strcmp (STR, "rpath") || !strcmp (STR, "include") \ || !strcmp (STR, "imacros") || !strcmp (STR, "aux-info") \ || !strcmp (STR, "idirafter") || !strcmp (STR, "iprefix") \ || !strcmp (STR, "iwithprefix") || !strcmp (STR, "iwithprefixbefore") \ || !strcmp (STR, "isystem"))/* Print subsidiary information on the compiler version in use. */#define TARGET_VERSION/* Run-time compilation parameters selecting different hardware subsets. *//* Which processor to schedule for. The cpu attribute defines a list that mirrors this list, so changes to alpha.md must be made at the same time. */enum processor_type {PROCESSOR_EV4, /* 2106[46]{a,} */ PROCESSOR_EV5, /* 21164{a,pc,} */ PROCESSOR_EV6}; /* 21264 */extern enum processor_type alpha_cpu;enum alpha_trap_precision{ ALPHA_TP_PROG, /* No precision (default). */ ALPHA_TP_FUNC, /* Trap contained within originating function. */ ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */};enum alpha_fp_rounding_mode{ ALPHA_FPRM_NORM, /* Normal rounding mode. */ ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ ALPHA_FPRM_DYN /* Dynamic rounding mode. */};enum alpha_fp_trap_mode{ ALPHA_FPTM_N, /* Normal trap mode. */ ALPHA_FPTM_U, /* Underflow traps enabled. */ ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */};extern int target_flags;extern enum alpha_trap_precision alpha_tp;extern enum alpha_fp_rounding_mode alpha_fprm;extern enum alpha_fp_trap_mode alpha_fptm;/* This means that floating-point support exists in the target implementation of the Alpha architecture. This is usually the default. */#define MASK_FP (1 << 0)#define TARGET_FP (target_flags & MASK_FP)/* This means that floating-point registers are allowed to be used. Note that Alpha implementations without FP operations are required to provide the FP registers. */#define MASK_FPREGS (1 << 1)#define TARGET_FPREGS (target_flags & MASK_FPREGS)/* This means that gas is used to process the assembler file. */#define MASK_GAS (1 << 2)#define TARGET_GAS (target_flags & MASK_GAS)/* This means that we should mark procedures as IEEE conformant. */#define MASK_IEEE_CONFORMANT (1 << 3)#define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)/* This means we should be IEEE-compliant except for inexact. */#define MASK_IEEE (1 << 4)#define TARGET_IEEE (target_flags & MASK_IEEE)/* This means we should be fully IEEE-compliant. */#define MASK_IEEE_WITH_INEXACT (1 << 5)#define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)/* This means we must construct all constants rather than emitting them as literal data. */#define MASK_BUILD_CONSTANTS (1 << 6)#define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)/* This means we handle floating points in VAX F- (float) or G- (double) Format. */#define MASK_FLOAT_VAX (1 << 7)#define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)/* This means that the processor has byte and half word loads and stores (the BWX extension). */#define MASK_BWX (1 << 8)#define TARGET_BWX (target_flags & MASK_BWX)/* This means that the processor has the MAX extension. */#define MASK_MAX (1 << 9)#define TARGET_MAX (target_flags & MASK_MAX)/* This means that the processor has the FIX extension. */#define MASK_FIX (1 << 10)#define TARGET_FIX (target_flags & MASK_FIX)/* This means that the processor has the CIX extension. */#define MASK_CIX (1 << 11)#define TARGET_CIX (target_flags & MASK_CIX)/* This means that the processor is an EV5, EV56, or PCA56. This is defined only in TARGET_CPU_DEFAULT. */#define MASK_CPU_EV5 (1 << 28)/* Likewise for EV6. */#define MASK_CPU_EV6 (1 << 29)/* This means we support the .arch directive in the assembler. Only defined in TARGET_CPU_DEFAULT. */#define MASK_SUPPORT_ARCH (1 << 30)#define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)/* These are for target os support and cannot be changed at runtime. */#ifndef TARGET_WINDOWS_NT#define TARGET_WINDOWS_NT 0#endif#ifndef TARGET_OPEN_VMS#define TARGET_OPEN_VMS 0#endif#ifndef TARGET_AS_CAN_SUBTRACT_LABELS#define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS#endif#ifndef TARGET_CAN_FAULT_IN_PROLOGUE#define TARGET_CAN_FAULT_IN_PROLOGUE 0#endif/* Macro to define tables used to set the flags. This is a list in braces of pairs in braces, each pair being { "NAME", VALUE } where VALUE is the bits to set or minus the bits to clear. An empty string NAME is used to identify the default VALUE. */#define TARGET_SWITCHES \ { {"no-soft-float", MASK_FP, "Use hardware fp"}, \ {"soft-float", - MASK_FP, "Do not use hardware fp"}, \ {"fp-regs", MASK_FPREGS, "Use fp registers"}, \ {"no-fp-regs", - (MASK_FP|MASK_FPREGS), "Do not use fp registers"}, \ {"alpha-as", -MASK_GAS, "Do not assume GAS"}, \ {"gas", MASK_GAS, "Assume GAS"}, \ {"ieee-conformant", MASK_IEEE_CONFORMANT, \ "Request IEEE-conformant math library routines (OSF/1)"}, \ {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \ "Emit IEEE-conformant code, without inexact exceptions"}, \ {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \ "Emit IEEE-conformant code, with inexact exceptions"}, \ {"build-constants", MASK_BUILD_CONSTANTS, \ "Do not emit complex integer constants to read-only memory"}, \ {"float-vax", MASK_FLOAT_VAX, "Use VAX fp"}, \ {"float-ieee", -MASK_FLOAT_VAX, "Do not use VAX fp"}, \ {"bwx", MASK_BWX, "Emit code for the byte/word ISA extension"}, \ {"no-bwx", -MASK_BWX, ""}, \ {"max", MASK_MAX, "Emit code for the motion video ISA extension"}, \ {"no-max", -MASK_MAX, ""}, \ {"fix", MASK_FIX, "Emit code for the fp move and sqrt ISA extension"}, \ {"no-fix", -MASK_FIX, ""}, \ {"cix", MASK_CIX, "Emit code for the counting ISA extension"}, \ {"no-cix", -MASK_CIX, ""}, \ {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT, ""} }#define TARGET_DEFAULT MASK_FP|MASK_FPREGS#ifndef TARGET_CPU_DEFAULT#define TARGET_CPU_DEFAULT 0#endif/* This macro is similar to `TARGET_SWITCHES' but defines names of command options that have values. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the fixed part of the option name, and the address of a variable. The variable, type `char *', is set to the variable part of the given option if the fixed part matches. The actual option name is made by appending `-m' to the specified name. Here is an example which defines `-mshort-data-NUMBER'. If the given option is `-mshort-data-512', the variable `m88k_short_data' will be set to the string `"512"'. extern char *m88k_short_data; #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */extern const char *alpha_cpu_string; /* For -mcpu= */extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */extern const char *alpha_mlat_string; /* For -mmemory-latency= */#define TARGET_OPTIONS \{ \ {"cpu=", &alpha_cpu_string, \ "Generate code for a given CPU"}, \ {"fp-rounding-mode=", &alpha_fprm_string, \ "Control the generated fp rounding mode"}, \ {"fp-trap-mode=", &alpha_fptm_string, \ "Control the IEEE trap mode"}, \ {"trap-precision=", &alpha_tp_string, \ "Control the precision given to fp exceptions"}, \ {"memory-latency=", &alpha_mlat_string, \ "Tune expected memory latency"}, \}/* Attempt to describe CPU characteristics to the preprocessor. *//* Corresponding to amask... */#define CPP_AM_BWX_SPEC "-D__alpha_bwx__ -Acpu(bwx)"#define CPP_AM_MAX_SPEC "-D__alpha_max__ -Acpu(max)"#define CPP_AM_FIX_SPEC "-D__alpha_fix__ -Acpu(fix)"#define CPP_AM_CIX_SPEC "-D__alpha_cix__ -Acpu(cix)"/* Corresponding to implver... */#define CPP_IM_EV4_SPEC "-D__alpha_ev4__ -Acpu(ev4)"#define CPP_IM_EV5_SPEC "-D__alpha_ev5__ -Acpu(ev5)"#define CPP_IM_EV6_SPEC "-D__alpha_ev6__ -Acpu(ev6)"/* Common combinations. */#define CPP_CPU_EV4_SPEC "%(cpp_im_ev4)"#define CPP_CPU_EV5_SPEC "%(cpp_im_ev5)"#define CPP_CPU_EV56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx)"#define CPP_CPU_PCA56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx) %(cpp_am_max)"#define CPP_CPU_EV6_SPEC "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix)"#ifndef CPP_CPU_DEFAULT_SPEC# if TARGET_CPU_DEFAULT & MASK_CPU_EV6# define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV6_SPEC# else# if TARGET_CPU_DEFAULT & MASK_CPU_EV5# if TARGET_CPU_DEFAULT & MASK_MAX# define CPP_CPU_DEFAULT_SPEC CPP_CPU_PCA56_SPEC# else# if TARGET_CPU_DEFAULT & MASK_BWX# define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV56_SPEC# else# define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV5_SPEC# endif# endif# else# define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV4_SPEC# endif# endif#endif /* CPP_CPU_DEFAULT_SPEC */#ifndef CPP_CPU_SPEC#define CPP_CPU_SPEC "\%{!undef:-Acpu(alpha) -Amachine(alpha) -D__alpha -D__alpha__ \%{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\%{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\%{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\%{mcpu=pca56|mcpu=21164pc|mcpu=21164PC:%(cpp_cpu_pca56) }\%{mcpu=ev6|mcpu=21264:%(cpp_cpu_ev6) }\%{!mcpu*:%(cpp_cpu_default) }}"#endif/* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the specification name, and a string constant that used by the GNU CC driver program. Do not define this macro if it does not need to do anything. */#ifndef SUBTARGET_EXTRA_SPECS#define SUBTARGET_EXTRA_SPECS#endif#define EXTRA_SPECS \ { "cpp_am_bwx", CPP_AM_BWX_SPEC }, \ { "cpp_am_max", CPP_AM_MAX_SPEC }, \ { "cpp_am_fix", CPP_AM_FIX_SPEC }, \ { "cpp_am_cix", CPP_AM_CIX_SPEC }, \ { "cpp_im_ev4", CPP_IM_EV4_SPEC }, \ { "cpp_im_ev5", CPP_IM_EV5_SPEC }, \ { "cpp_im_ev6", CPP_IM_EV6_SPEC }, \ { "cpp_cpu_ev4", CPP_CPU_EV4_SPEC }, \ { "cpp_cpu_ev5", CPP_CPU_EV5_SPEC }, \ { "cpp_cpu_ev56", CPP_CPU_EV56_SPEC }, \ { "cpp_cpu_pca56", CPP_CPU_PCA56_SPEC }, \ { "cpp_cpu_ev6", CPP_CPU_EV6_SPEC }, \ { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ { "cpp_cpu", CPP_CPU_SPEC }, \ { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ SUBTARGET_EXTRA_SPECS/* Sometimes certain combinations of command options do not make sense
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