m68k.h

gcc-2.95.3 Linux下最常用的C编译器

/* Definitions of target machine for GNU compiler.  Sun 68000/68020 version.
   Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
   Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */


/* Note that some other tm.h files include this one and then override
   many of the definitions that relate to assembler syntax.  */


/* Names to predefine in the preprocessor for this target machine.  */

/* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES.  */

/* Print subsidiary information on the compiler version in use.  */
#ifdef MOTOROLA
#define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
#else
#define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
#endif

/* Define SUPPORT_SUN_FPA to include support for generating code for
   the Sun Floating Point Accelerator, an optional product for Sun 3
   machines.  By default, it is not defined.  Avoid defining it unless
   you need to output code for the Sun3+FPA architecture, as it has the
   effect of slowing down the register set operations in hard-reg-set.h
   (total number of registers will exceed number of bits in a long,
   if defined, causing the set operations to expand to loops).
   SUPPORT_SUN_FPA is typically defined in sun3.h.  */

/* Run-time compilation parameters selecting different hardware subsets.  */

extern int target_flags;

/* Macros used in the machine description to test the flags.  */

/* Compile for a 68020 (not a 68000 or 68010).  */
#define MASK_68020	1
#define TARGET_68020 (target_flags & MASK_68020)

/* Compile 68881 insns for floating point (not library calls).  */
#define MASK_68881	2
#define TARGET_68881 (target_flags & MASK_68881)

/* Compile using 68020 bitfield insns.  */
#define MASK_BITFIELD	4
#define TARGET_BITFIELD (target_flags & MASK_BITFIELD)

/* Compile using rtd insn calling sequence.
   This will not work unless you use prototypes at least
   for all functions that can take varying numbers of args.  */
#define MASK_RTD	8
#define TARGET_RTD (target_flags & MASK_RTD)

/* Compile passing first two args in regs 0 and 1.
   This exists only to test compiler features that will
   be needed for RISC chips.  It is not usable
   and is not intended to be usable on this cpu.  */
#define MASK_REGPARM	16
#define TARGET_REGPARM (target_flags & MASK_REGPARM)

/* Compile with 16-bit `int'.  */
#define MASK_SHORT	32
#define TARGET_SHORT (target_flags & MASK_SHORT)

/* Compile with special insns for Sun FPA.  */
#define MASK_FPA	64
#define TARGET_FPA (target_flags & MASK_FPA)

/* Compile (actually, link) for Sun SKY board.  */
#define MASK_SKY	128
#define TARGET_SKY (target_flags & MASK_SKY)

/* Optimize for 68040, but still allow execution on 68020
   (-m68020-40 or -m68040).
   The 68040 will execute all 68030 and 68881/2 instructions, but some
   of them must be emulated in software by the OS.  When TARGET_68040 is
   turned on, these instructions won't be used.  This code will still
   run on a 68030 and 68881/2. */
#define MASK_68040	256
#define TARGET_68040 (target_flags & MASK_68040)

/* Use the 68040-only fp instructions (-m68040 or -m68060).  */
#define MASK_68040_ONLY	512
#define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)

/* Optimize for 68060, but still allow execution on 68020
   (-m68020-60 or -m68060).
   The 68060 will execute all 68030 and 68881/2 instructions, but some
   of them must be emulated in software by the OS.  When TARGET_68060 is
   turned on, these instructions won't be used.  This code will still
   run on a 68030 and 68881/2. */
#define MASK_68060	1024
#define TARGET_68060 (target_flags & MASK_68060)

/* Compile for mcf5200 */
#define MASK_5200	2048
#define TARGET_5200 (target_flags & MASK_5200)

/* Align ints to a word boundary.  This breaks compatibility with the 
   published ABI's for structures containing ints, but produces faster
   code on cpus with 32 bit busses (020, 030, 040, 060, CPU32+, coldfire).
   It's required for coldfire cpus without a misalignment module.  */
#define MASK_ALIGN_INT	4096
#define TARGET_ALIGN_INT (target_flags & MASK_ALIGN_INT)

/* Compile for a CPU32 */
	/* A 68020 without bitfields is a good heuristic for a CPU32 */
#define TARGET_CPU32	(TARGET_68020 && !TARGET_BITFIELD)

/* Macro to define tables used to set the flags.
   This is a list in braces of pairs in braces,
   each pair being { "NAME", VALUE }
   where VALUE is the bits to set or minus the bits to clear.
   An empty string NAME is used to identify the default VALUE.  */

#define TARGET_SWITCHES  \
  { { "68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)},	\
    { "c68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)},	\
    { "68020", (MASK_68020|MASK_BITFIELD)},				\
    { "c68020", (MASK_68020|MASK_BITFIELD)},				\
    { "68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\
		|MASK_68020|MASK_BITFIELD|MASK_68881)},			\
    { "c68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\
		|MASK_68020|MASK_BITFIELD|MASK_68881)},			\
    { "bitfield", MASK_BITFIELD},					\
    { "nobitfield", - MASK_BITFIELD},					\
    { "rtd", MASK_RTD},							\
    { "nortd", - MASK_RTD},						\
    { "short", MASK_SHORT},						\
    { "noshort", - MASK_SHORT},						\
    { "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881)},			\
    { "fpa", MASK_FPA},							\
    { "nofpa", - MASK_FPA},						\
    { "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881)},			\
    { "sky", MASK_SKY},							\
    { "nosky", - MASK_SKY},						\
    { "68881", - (MASK_FPA|MASK_SKY)},					\
    { "68881", MASK_68881},						\
    { "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881)},	\
    { "68020-40", -(MASK_5200|MASK_68060|MASK_68040_ONLY)},		\
    { "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040)},	\
    { "68020-60", -(MASK_5200|MASK_68040_ONLY)},			\
    { "68020-60", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040	\
		   |MASK_68060)},					\
    { "68030", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)},	\
    { "68030", (MASK_68020|MASK_BITFIELD)},				\
    { "68040", - (MASK_5200|MASK_68060)},				\
    { "68040", (MASK_68020|MASK_68881|MASK_BITFIELD			\
		|MASK_68040_ONLY|MASK_68040)},				\
    { "68060", - (MASK_5200|MASK_68040)},				\
    { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD			\
		|MASK_68040_ONLY|MASK_68060)},				\
    { "5200", - (MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020	\
		|MASK_BITFIELD|MASK_68881)},				\
    { "5200", (MASK_5200)},						\
    { "68851", 0},							\
    { "no-68851", 0},							\
    { "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\
		  |MASK_68020|MASK_BITFIELD|MASK_68881)},		\
    { "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\
		  |MASK_BITFIELD|MASK_68881)},				\
    { "68332", MASK_68020},						\
    { "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\
		  |MASK_BITFIELD|MASK_68881)},				\
    { "cpu32", MASK_68020},						\
    { "align-int", MASK_ALIGN_INT },					\
    { "no-align-int", -MASK_ALIGN_INT },				\
    SUBTARGET_SWITCHES							\
    { "", TARGET_DEFAULT}}
/* TARGET_DEFAULT is defined in sun*.h and isi.h, etc.  */

/* This macro is similar to `TARGET_SWITCHES' but defines names of
   command options that have values.  Its definition is an
   initializer with a subgrouping for each command option.

   Each subgrouping contains a string constant, that defines the
   fixed part of the option name, and the address of a variable.  The
   variable, type `char *', is set to the variable part of the given
   option if the fixed part matches.  The actual option name is made
   by appending `-m' to the specified name.  */
#define TARGET_OPTIONS							\
{ { "align-loops=",	&m68k_align_loops_string },			\
  { "align-jumps=",	&m68k_align_jumps_string },			\
  { "align-functions=",	&m68k_align_funcs_string },			\
  SUBTARGET_OPTIONS							\
}

/* Sometimes certain combinations of command options do not make
   sense on a particular target machine.  You can define a macro
   `OVERRIDE_OPTIONS' to take account of this.  This macro, if
   defined, is executed once just after all the command options have
   been parsed.

   Don't use this macro to turn on various extra optimizations for
   `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */

#define OVERRIDE_OPTIONS		\
{					\
  override_options();			\
  if (! TARGET_68020 && flag_pic == 2)	\
    error("-fPIC is not currently supported on the 68000 or 68010\n");	\
  SUBTARGET_OVERRIDE_OPTIONS;		\
}

/* These are meant to be redefined in the host dependent files */
#define SUBTARGET_SWITCHES
#define SUBTARGET_OPTIONS
#define SUBTARGET_OVERRIDE_OPTIONS

/* target machine storage layout */

/* Define for XFmode extended real floating point support.
   This will automatically cause REAL_ARITHMETIC to be defined.  */
#define LONG_DOUBLE_TYPE_SIZE 96

/* Define if you don't want extended real, but do want to use the
   software floating point emulator for REAL_ARITHMETIC and
   decimal <-> binary conversion. */
/* #define REAL_ARITHMETIC */

/* Define this if most significant bit is lowest numbered
   in instructions that operate on numbered bit-fields.
   This is true for 68020 insns such as bfins and bfexts.
   We make it true always by avoiding using the single-bit insns
   except in special cases with constant bit numbers.  */
#define BITS_BIG_ENDIAN 1

/* Define this if most significant byte of a word is the lowest numbered.  */
/* That is true on the 68000.  */
#define BYTES_BIG_ENDIAN 1

/* Define this if most significant word of a multiword number is the lowest
   numbered.  */
/* For 68000 we can decide arbitrarily
   since there are no machine instructions for them.
   So let's be consistent.  */
#define WORDS_BIG_ENDIAN 1

/* number of bits in an addressable storage unit */
#define BITS_PER_UNIT 8

/* Width in bits of a "word", which is the contents of a machine register.
   Note that this is not necessarily the width of data type `int';
   if using 16-bit ints on a 68000, this would still be 32.
   But on a machine with 16-bit registers, this would be 16.  */
#define BITS_PER_WORD 32

/* Width of a word, in units (bytes).  */
#define UNITS_PER_WORD 4

/* Width in bits of a pointer.
   See also the macro `Pmode' defined below.  */
#define POINTER_SIZE 32

/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
#define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)

/* Boundary (in *bits*) on which stack pointer should be aligned.  */
#define STACK_BOUNDARY 16

/* Allocation boundary (in *bits*) for the code of a function.  */
#define FUNCTION_BOUNDARY (1 << (m68k_align_funcs + 3))

/* Alignment of field after `int : 0' in a structure.  */
#define EMPTY_FIELD_BOUNDARY 16

/* No data type wants to be aligned rounder than this. 
   Most published ABIs say that ints should be aligned on 16 bit
   boundaries, but cpus with 32 bit busses get better performance
   aligned on 32 bit boundaries.  Coldfires without a misalignment
   module require 32 bit alignment. */
#define BIGGEST_ALIGNMENT (TARGET_ALIGN_INT ? 32 : 16)

/* Set this nonzero if move instructions will actually fail to work
   when given unaligned data.  */
#define STRICT_ALIGNMENT 1

/* Maximum power of 2 that code can be aligned to.  */
#define MAX_CODE_ALIGN	2			/* 4 byte alignment */

/* Align loop starts for optimal branching.  */
#define LOOP_ALIGN(LABEL) (m68k_align_loops)

/* This is how to align an instruction for optimal branching. */
#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (m68k_align_jumps)

#define SELECT_RTX_SECTION(MODE, X)					\
{									\
  if (!flag_pic)							\
    readonly_data_section();						\
  else if (LEGITIMATE_PIC_OPERAND_P (X))				\
    readonly_data_section();						\
  else									\
    data_section();							\
}

/* Define number of bits in most basic integer type.
   (If undefined, default is BITS_PER_WORD).  */

#define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)

/* Define these to avoid dependence on meaning of `int'.
   Note that WCHAR_TYPE_SIZE is used in cexp.y,
   where TARGET_SHORT is not available.  */

#define WCHAR_TYPE "long int"
#define WCHAR_TYPE_SIZE 32

/* Standard register usage.  */

/* Number of actual hardware registers.
   The hardware registers are assigned numbers for the compiler
   from 0 to just below FIRST_PSEUDO_REGISTER.
   All registers that the compiler knows about must be given numbers,
   even those that are not normally considered general registers.
   For the 68000, we give the data registers numbers 0-7,
   the address registers numbers 010-017,
   and the 68881 floating point registers numbers 020-027.  */
#ifndef SUPPORT_SUN_FPA
#define FIRST_PSEUDO_REGISTER 24
#else
#define FIRST_PSEUDO_REGISTER 56
#endif

/* This defines the register which is used to hold the offset table for PIC. */