📄 mips.h
字号:
#define TARGET_SPLIT_ADDRESSES (target_flags & MASK_SPLIT_ADDR)/* generate mips 3900 insns */#define TARGET_MIPS3900 (target_flags & MASK_MIPS3900) /* Mips vs. GNU assembler */#define TARGET_GAS (target_flags & MASK_GAS)#define TARGET_UNIX_ASM (!TARGET_GAS)#define TARGET_MIPS_AS TARGET_UNIX_ASM /* Debug Mode */#define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)#define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)#define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)#define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)#define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)#define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)#define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)#define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)#define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)#define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I) /* Reg. Naming in .s ($21 vs. $a0) */#define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS) /* Optimize for Sdata/Sbss */#define TARGET_GP_OPT (target_flags & MASK_GPOPT) /* print program statistics */#define TARGET_STATS (target_flags & MASK_STATS) /* call memcpy instead of inline code */#define TARGET_MEMCPY (target_flags & MASK_MEMCPY) /* .abicalls, etc from Pyramid V.4 */#define TARGET_ABICALLS (target_flags & MASK_ABICALLS) /* OSF pic references to externs */#define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC) /* software floating point */#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) /* always call through a register */#define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS) /* generate embedded PIC code; requires gas. */#define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC) /* for embedded systems, optimize for reduced RAM space instead of for fastest code. */#define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA) /* generate big endian code. */#define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)#define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT)#define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT)#define TARGET_MAD (target_flags & MASK_MAD)#define TARGET_4300_MUL_FIX (target_flags & MASK_4300_MUL_FIX)#define TARGET_NO_CHECK_ZERO_DIV (target_flags & MASK_NO_CHECK_ZERO_DIV)#define TARGET_CHECK_RANGE_DIV (target_flags & MASK_CHECK_RANGE_DIV)/* This is true if we must enable the assembly language file switching code. */#define TARGET_FILE_SWITCHING (TARGET_GP_OPT && ! TARGET_GAS)/* We must disable the function end stabs when doing the file switching trick, because the Lscope stabs end up in the wrong place, making it impossible to debug the resulting code. */#define NO_DBX_FUNCTION_END TARGET_FILE_SWITCHING /* Generate mips16 code */#define TARGET_MIPS16 (target_flags & MASK_MIPS16)/* Macro to define tables used to set the flags. This is a list in braces of pairs in braces, each pair being { "NAME", VALUE } where VALUE is the bits to set or minus the bits to clear. An empty string NAME is used to identify the default VALUE. */#define TARGET_SWITCHES \{ \ {"int64", MASK_INT64 | MASK_LONG64, \ "Use 64-bit int type"}, \ {"long64", MASK_LONG64, \ "Use 64-bit long type"}, \ {"long32", -(MASK_LONG64 | MASK_INT64), \ "Use 32-bit long type"}, \ {"split-addresses", MASK_SPLIT_ADDR, \ "Optimize lui/addiu address loads"}, \ {"no-split-addresses", -MASK_SPLIT_ADDR, \ "Don't optimize lui/addiu address loads"}, \ {"mips-as", -MASK_GAS, \ "Use MIPS as"}, \ {"gas", MASK_GAS, \ "Use GNU as"}, \ {"rnames", MASK_NAME_REGS, \ "Use symbolic register names"}, \ {"no-rnames", -MASK_NAME_REGS, \ "Don't use symbolic register names"}, \ {"gpOPT", MASK_GPOPT, \ "Use GP relative sdata/sbss sections"}, \ {"gpopt", MASK_GPOPT, \ "Use GP relative sdata/sbss sections"}, \ {"no-gpOPT", -MASK_GPOPT, \ "Don't use GP relative sdata/sbss sections"}, \ {"no-gpopt", -MASK_GPOPT, \ "Don't use GP relative sdata/sbss sections"}, \ {"stats", MASK_STATS, \ "Output compiler statistics"}, \ {"no-stats", -MASK_STATS, \ "Don't output compiler statistics"}, \ {"memcpy", MASK_MEMCPY, \ "Don't optimize block moves"}, \ {"no-memcpy", -MASK_MEMCPY, \ "Optimize block moves"}, \ {"mips-tfile", MASK_MIPS_TFILE, \ "Use mips-tfile asm postpass"}, \ {"no-mips-tfile", -MASK_MIPS_TFILE, \ "Don't use mips-tfile asm postpass"}, \ {"soft-float", MASK_SOFT_FLOAT, \ "Use software floating point"}, \ {"hard-float", -MASK_SOFT_FLOAT, \ "Use hardware floating point"}, \ {"fp64", MASK_FLOAT64, \ "Use 64-bit FP registers"}, \ {"fp32", -MASK_FLOAT64, \ "Use 32-bit FP registers"}, \ {"gp64", MASK_64BIT, \ "Use 64-bit general registers"}, \ {"gp32", -MASK_64BIT, \ "Use 32-bit general registers"}, \ {"abicalls", MASK_ABICALLS, \ "Use Irix PIC"}, \ {"no-abicalls", -MASK_ABICALLS, \ "Don't use Irix PIC"}, \ {"half-pic", MASK_HALF_PIC, \ "Use OSF PIC"}, \ {"no-half-pic", -MASK_HALF_PIC, \ "Don't use OSF PIC"}, \ {"long-calls", MASK_LONG_CALLS, \ "Use indirect calls"}, \ {"no-long-calls", -MASK_LONG_CALLS, \ "Don't use indirect calls"}, \ {"embedded-pic", MASK_EMBEDDED_PIC, \ "Use embedded PIC"}, \ {"no-embedded-pic", -MASK_EMBEDDED_PIC, \ "Don't use embedded PIC"}, \ {"embedded-data", MASK_EMBEDDED_DATA, \ "Use ROM instead of RAM"}, \ {"no-embedded-data", -MASK_EMBEDDED_DATA, \ "Don't use ROM instead of RAM"}, \ {"eb", MASK_BIG_ENDIAN, \ "Use big-endian byte order"}, \ {"el", -MASK_BIG_ENDIAN, \ "Use little-endian byte order"}, \ {"single-float", MASK_SINGLE_FLOAT, \ "Use single (32-bit) FP only"}, \ {"double-float", -MASK_SINGLE_FLOAT, \ "Don't use single (32-bit) FP only"}, \ {"mad", MASK_MAD, \ "Use multiply accumulate"}, \ {"no-mad", -MASK_MAD, \ "Don't use multiply accumulate"}, \ {"fix4300", MASK_4300_MUL_FIX, \ "Work around early 4300 hardware bug"}, \ {"no-fix4300", -MASK_4300_MUL_FIX, \ "Don't work around early 4300 hardware bug"}, \ {"4650", MASK_MAD | MASK_SINGLE_FLOAT, \ "Optimize for 4650"}, \ {"3900", MASK_MIPS3900, \ "Optimize for 3900"}, \ {"check-zero-division",-MASK_NO_CHECK_ZERO_DIV, \ "Trap on integer divide by zero"}, \ {"no-check-zero-division", MASK_NO_CHECK_ZERO_DIV, \ "Don't trap on integer divide by zero"}, \ {"check-range-division",MASK_CHECK_RANGE_DIV, \ "Trap on integer divide overflow"}, \ {"no-check-range-division",-MASK_CHECK_RANGE_DIV, \ "Don't trap on integer divide overflow"}, \ {"debug", MASK_DEBUG, \ NULL}, \ {"debuga", MASK_DEBUG_A, \ NULL}, \ {"debugb", MASK_DEBUG_B, \ NULL}, \ {"debugc", MASK_DEBUG_C, \ NULL}, \ {"debugd", MASK_DEBUG_D, \ NULL}, \ {"debuge", MASK_DEBUG_E, \ NULL}, \ {"debugf", MASK_DEBUG_F, \ NULL}, \ {"debugg", MASK_DEBUG_G, \ NULL}, \ {"debugh", MASK_DEBUG_H, \ NULL}, \ {"debugi", MASK_DEBUG_I, \ NULL}, \ {"", (TARGET_DEFAULT \ | TARGET_CPU_DEFAULT \ | TARGET_ENDIAN_DEFAULT), \ NULL}, \} /* Default target_flags if no switches are specified */#ifndef TARGET_DEFAULT#define TARGET_DEFAULT 0#endif#ifndef TARGET_CPU_DEFAULT#define TARGET_CPU_DEFAULT 0#endif#ifndef TARGET_ENDIAN_DEFAULT#ifndef DECSTATION#define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN#else#define TARGET_ENDIAN_DEFAULT 0#endif#endif#ifndef MULTILIB_DEFAULTS#if TARGET_ENDIAN_DEFAULT == 0#define MULTILIB_DEFAULTS { "EL", "mips1" }#else#define MULTILIB_DEFAULTS { "EB", "mips1" }#endif#endif/* We must pass -EL to the linker by default for little endian embedded targets using linker scripts with a OUTPUT_FORMAT line. Otherwise, the linker will default to using big-endian output files. The OUTPUT_FORMAT line must be in the linker script, otherwise -EB/-EL will not work. */#ifndef LINKER_ENDIAN_SPEC#if TARGET_ENDIAN_DEFAULT == 0#define LINKER_ENDIAN_SPEC "%{!EB:%{!meb:-EL}}"#else#define LINKER_ENDIAN_SPEC ""#endif#endif/* This macro is similar to `TARGET_SWITCHES' but defines names of command options that have values. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the fixed part of the option name, and the address of a variable. The variable, type `char *', is set to the variable part of the given option if the fixed part matches. The actual option name is made by appending `-m' to the specified name. Here is an example which defines `-mshort-data-NUMBER'. If the given option is `-mshort-data-512', the variable `m88k_short_data' will be set to the string `"512"'. extern char *m88k_short_data; #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */#define TARGET_OPTIONS \{ \ SUBTARGET_TARGET_OPTIONS \ { "cpu=", &mips_cpu_string, \ "Specify CPU for scheduling purposes"}, \ { "ips", &mips_isa_string, \ "Specify MIPS ISA"}, \ { "entry", &mips_entry_string, \ "Use mips16 entry/exit psuedo ops"}, \ { "no-mips16", &mips_no_mips16_string, \ "Don't use MIPS16 instructions"}, \ { "explicit-type-size", &mips_explicit_type_size_string, \ NULL}, \}/* This is meant to be redefined in the host dependent files. */#define SUBTARGET_TARGET_OPTIONS#define GENERATE_BRANCHLIKELY (!TARGET_MIPS16 && (TARGET_MIPS3900 || (mips_isa >= 2)))/* Generate three-operand multiply instructions for both SImode and DImode. */#define GENERATE_MULT3 (TARGET_MIPS3900 \ && !TARGET_MIPS16)/* Macros to decide whether certain features are available or not, depending on the instruction set architecture level. */#define BRANCH_LIKELY_P() GENERATE_BRANCHLIKELY#define HAVE_SQRT_P() (mips_isa >= 2)/* CC1_SPEC causes -mips3 and -mips4 to set -mfp64 and -mgp64; -mips1 or -mips2 sets -mfp32 and -mgp32. This can be overridden by an explicit -mfp32, -mfp64, -mgp32 or -mgp64. -mfp64 sets MASK_FLOAT64 in target_flags, and -mgp64 sets MASK_64BIT. Setting MASK_64BIT in target_flags will cause gcc to assume that registers are 64 bits wide. int, long and void * will be 32 bit; this may be changed with -mint64 or -mlong64. The gen* programs link code that refers to MASK_64BIT. They don't actually use the information in target_flags; they just refer to it. *//* Switch Recognition by gcc.c. Add -G xx support */#ifdef SWITCH_TAKES_ARG#undef SWITCH_TAKES_ARG#endif#define SWITCH_TAKES_ARG(CHAR) \ (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')/* Sometimes certain combinations of command options do not make sense on a particular target machine. You can define a macro `OVERRIDE_OPTIONS' to take account of this. This macro, if defined, is executed once just after all the command options have been parsed. On the MIPS, it is used to handle -G. We also use it to set up all of the tables referenced in the other macros. */#define OVERRIDE_OPTIONS override_options ()/* Zero or more C statements that may conditionally modify two variables `fixed_regs' and `call_used_regs' (both of type `char []') after they have been initialized from the two preceding macros. This is necessary in case the fixed or call-clobbered registers depend on target flags. You need not define this macro if it has no work to do. If the usage of an entire class of registers depends on the target flags, you may indicate this to GCC by using this macro to modify `fixed_regs' and `call_used_regs' to 1 for each of the registers in the classes which should not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a letter for a class that shouldn't be used. (However, if this class is not included in `GENERAL_REGS' and all of the insn patterns whose constraints permit this class are controlled by target switches, then GCC will automatically avoid using these registers when the target switches are opposed to them.) */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -