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📄 startup.lst

📁 LM3s8962 以太网速度测试
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ARM Macro Assembler    Page 1 


    1 00000000         ; <<< Use Configuration Wizard in Context Menu >>>
    2 00000000         ;*******************************************************
                       ***********************
    3 00000000         ;
    4 00000000         ; Startup.s - Startup code for Stellaris.
    5 00000000         ;
    6 00000000         ; Copyright (c) 2006-2008 Luminary Micro, Inc.  All righ
                       ts reserved.
    7 00000000         ; 
    8 00000000         ; Software License Agreement
    9 00000000         ; 
   10 00000000         ; Luminary Micro, Inc. (LMI) is supplying this software 
                       for use solely and
   11 00000000         ; exclusively on LMI's microcontroller products.
   12 00000000         ; 
   13 00000000         ; The software is owned by LMI and/or its suppliers, and
                        is protected under
   14 00000000         ; applicable copyright laws.  All rights are reserved.  
                       You may not combine
   15 00000000         ; this software with "viral" open-source software in ord
                       er to form a larger
   16 00000000         ; program.  Any use in violation of the foregoing restri
                       ctions may subject
   17 00000000         ; the user to criminal sanctions under applicable laws, 
                       as well as to civil
   18 00000000         ; liability for the breach of the terms and conditions o
                       f this license.
   19 00000000         ; 
   20 00000000         ; THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHE
                       THER EXPRESS, IMPLIED
   21 00000000         ; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED W
                       ARRANTIES OF
   22 00000000         ; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE A
                       PPLY TO THIS SOFTWARE.
   23 00000000         ; LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPE
                       CIAL, INCIDENTAL, OR
   24 00000000         ; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
   25 00000000         ; 
   26 00000000         ; This is part of revision 2523 of the Stellaris Periphe
                       ral Driver Library.
   27 00000000         ;
   28 00000000         ;*******************************************************
                       ***********************
   29 00000000         
   30 00000000         ;*******************************************************
                       ***********************
   31 00000000         ;
   32 00000000         ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
   33 00000000         ;
   34 00000000         ;*******************************************************
                       ***********************
   35 00000000 00000100 
                       Stack   EQU              0x00000100
   36 00000000         
   37 00000000         ;*******************************************************
                       ***********************
   38 00000000         ;
   39 00000000         ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
   40 00000000         ;



ARM Macro Assembler    Page 2 


   41 00000000         ;*******************************************************
                       ***********************
   42 00000000 00000000 
                       Heap    EQU              0x00000000
   43 00000000         
   44 00000000         ;*******************************************************
                       ***********************
   45 00000000         ;
   46 00000000         ; Allocate space for the stack.
   47 00000000         ;
   48 00000000         ;*******************************************************
                       ***********************
   49 00000000                 AREA             STACK, NOINIT, READWRITE, ALIGN
=3
   50 00000000         StackMem
   51 00000000                 SPACE            Stack
   52 00000100         __initial_sp
   53 00000100         
   54 00000100         ;*******************************************************
                       ***********************
   55 00000100         ;
   56 00000100         ; Allocate space for the heap.
   57 00000100         ;
   58 00000100         ;*******************************************************
                       ***********************
   59 00000100                 AREA             HEAP, NOINIT, READWRITE, ALIGN=
3
   60 00000000         __heap_base
   61 00000000         HeapMem
   62 00000000                 SPACE            Heap
   63 00000000         __heap_limit
   64 00000000         
   65 00000000         ;*******************************************************
                       ***********************
   66 00000000         ;
   67 00000000         ; Indicate that the code in this file preserves 8-byte a
                       lignment of the stack.
   68 00000000         ;
   69 00000000         ;*******************************************************
                       ***********************
   70 00000000                 PRESERVE8
   71 00000000         
   72 00000000         ;*******************************************************
                       ***********************
   73 00000000         ;
   74 00000000         ; Place code into the reset code section.
   75 00000000         ;
   76 00000000         ;*******************************************************
                       ***********************
   77 00000000                 AREA             RESET, CODE, READONLY
   78 00000000                 THUMB
   79 00000000         
   80 00000000         ;*******************************************************
                       ***********************
   81 00000000         ;
   82 00000000         ; The vector table.
   83 00000000         ;
   84 00000000         ;*******************************************************
                       ***********************



ARM Macro Assembler    Page 3 


   85 00000000                 EXPORT           __Vectors
   86 00000000         __Vectors
   87 00000000 00000100        DCD              StackMem + Stack ; Top of Stack
                                                            
   88 00000004 00000000        DCD              Reset_Handler ; Reset Handler
   89 00000008 00000000        DCD              NmiSR       ; NMI Handler
   90 0000000C 00000000        DCD              FaultISR    ; Hard Fault Handle
                                                            r
   91 00000010 00000000        DCD              IntDefaultHandler 
                                                            ; MPU Fault Handler
                                                            
   92 00000014 00000000        DCD              IntDefaultHandler 
                                                            ; Bus Fault Handler
                                                            
   93 00000018 00000000        DCD              IntDefaultHandler ; Usage Fault
                                                             Handler
   94 0000001C 00000000        DCD              0           ; Reserved
   95 00000020 00000000        DCD              0           ; Reserved
   96 00000024 00000000        DCD              0           ; Reserved
   97 00000028 00000000        DCD              0           ; Reserved
   98 0000002C 00000000        DCD              IntDefaultHandler 
                                                            ; SVCall Handler
   99 00000030 00000000        DCD              IntDefaultHandler ; Debug Monit
                                                            or Handler
  100 00000034 00000000        DCD              0           ; Reserved
  101 00000038 00000000        DCD              IntDefaultHandler 
                                                            ; PendSV Handler
  102 0000003C 00000000        DCD              IntDefaultHandler 
                                                            ; SysTick Handler
  103 00000040 00000000        DCD              IntDefaultHandler ; GPIO Port A
                                                            
  104 00000044 00000000        DCD              IntDefaultHandler ; GPIO Port B
                                                            
  105 00000048 00000000        DCD              IntDefaultHandler ; GPIO Port C
                                                            
  106 0000004C 00000000        DCD              IntDefaultHandler ; GPIO Port D
                                                            
  107 00000050 00000000        DCD              IntDefaultHandler ; GPIO Port E
                                                            
  108 00000054 00000000        DCD              IntDefaultHandler ; UART0
  109 00000058 00000000        DCD              IntDefaultHandler ; UART1
  110 0000005C 00000000        DCD              IntDefaultHandler ; SSI
  111 00000060 00000000        DCD              IntDefaultHandler ; I2C
  112 00000064 00000000        DCD              IntDefaultHandler ; PWM Fault
  113 00000068 00000000        DCD              IntDefaultHandler 
                                                            ; PWM Generator 0
  114 0000006C 00000000        DCD              IntDefaultHandler 
                                                            ; PWM Generator 1
  115 00000070 00000000        DCD              IntDefaultHandler 
                                                            ; PWM Generator 2
  116 00000074 00000000        DCD              IntDefaultHandler ; Quadrature 
                                                            Encoder
  117 00000078 00000000        DCD              IntDefaultHandler 
                                                            ; ADC Sequence 0
  118 0000007C 00000000        DCD              IntDefaultHandler 
                                                            ; ADC Sequence 1
  119 00000080 00000000        DCD              IntDefaultHandler 
                                                            ; ADC Sequence 2
  120 00000084 00000000        DCD              IntDefaultHandler 



ARM Macro Assembler    Page 4 


                                                            ; ADC Sequence 3
  121 00000088 00000000        DCD              IntDefaultHandler ; Watchdog
  122 0000008C 00000000        DCD              IntDefaultHandler ; Timer 0A
  123 00000090 00000000        DCD              IntDefaultHandler ; Timer 0B
  124 00000094 00000000        DCD              IntDefaultHandler ; Timer 1A
  125 00000098 00000000        DCD              IntDefaultHandler ; Timer 1B
  126 0000009C 00000000        DCD              IntDefaultHandler ; Timer 2A
  127 000000A0 00000000        DCD              IntDefaultHandler ; Timer 2B
  128 000000A4 00000000        DCD              IntDefaultHandler ; Comp 0
  129 000000A8 00000000        DCD              IntDefaultHandler ; Comp 1
  130 000000AC 00000000        DCD              IntDefaultHandler ; Comp 2
  131 000000B0 00000000        DCD              IntDefaultHandler 
                                                            ; System Control
  132 000000B4 00000000        DCD              IntDefaultHandler 
                                                            ; Flash Control
  133 000000B8 00000000        DCD              IntDefaultHandler ; GPIO Port F
                                                            
  134 000000BC 00000000        DCD              IntDefaultHandler ; GPIO Port G
                                                            
  135 000000C0 00000000        DCD              IntDefaultHandler ; GPIO Port H
                                                            
  136 000000C4 00000000        DCD              IntDefaultHandler 
                                                            ; UART2 Rx and Tx
  137 000000C8 00000000        DCD              IntDefaultHandler 
                                                            ; SSI1 Rx and Tx
  138 000000CC 00000000        DCD              IntDefaultHandler ; Timer 3 sub
                                                            timer A
  139 000000D0 00000000        DCD              IntDefaultHandler ; Timer 3 sub
                                                            timer B
  140 000000D4 00000000        DCD              IntDefaultHandler ; I2C1 Master
                                                             and Slave
  141 000000D8 00000000        DCD              IntDefaultHandler ; Quadrature 
                                                            Encoder 1
  142 000000DC 00000000        DCD              IntDefaultHandler ; CAN0
  143 000000E0 00000000        DCD              IntDefaultHandler ; CAN1
  144 000000E4 00000000        DCD              IntDefaultHandler ; CAN2
  145 000000E8 00000000        DCD              IntDefaultHandler ; Ethernet
  146 000000EC 00000000        DCD              IntDefaultHandler ; Hibernate
  147 000000F0 00000000        DCD              IntDefaultHandler ; USB0
  148 000000F4 00000000        DCD              IntDefaultHandler 
                                                            ; PWM Generator 3
  149 000000F8 00000000        DCD              IntDefaultHandler ; uDMA Softwa
                                                            re Transfer
  150 000000FC 00000000        DCD              IntDefaultHandler ; uDMA Error
  151 00000100         
  152 00000100         ;*******************************************************
                       ***********************
  153 00000100         ;
  154 00000100         ; This is the code that gets called when the processor f
                       irst starts execution
  155 00000100         ; following a reset event.
  156 00000100         ;
  157 00000100         ;*******************************************************
                       ***********************
  158 00000100                 EXPORT           Reset_Handler
  159 00000100         Reset_Handler
  160 00000100         ;
  161 00000100         ; Call the C library enty point that handles startup.  T
                       his will copy



ARM Macro Assembler    Page 5 


  162 00000100         ; the .data section initializers from flash to SRAM and 
                       zero fill the
  163 00000100         ; .bss section.
  164 00000100         ;
  165 00000100                 IMPORT           __main
  166 00000100 F7FF BFFE       B                __main
  167 00000104         
  168 00000104         ;*******************************************************
                       ***********************
  169 00000104         ;
  170 00000104         ; This is the code that gets called when the processor r
                       eceives a NMI.  This
  171 00000104         ; simply enters an infinite loop, preserving the system 
                       state for examination
  172 00000104         ; by a debugger.
  173 00000104         ;
  174 00000104         ;*******************************************************
                       ***********************
  175 00000104         NmiSR
  176 00000104 E7FE            B                NmiSR
  177 00000106         
  178 00000106         ;*******************************************************
                       ***********************
  179 00000106         ;
  180 00000106         ; This is the code that gets called when the processor r
                       eceives a fault
  181 00000106         ; interrupt.  This simply enters an infinite loop, prese
                       rving the system state
  182 00000106         ; for examination by a debugger.
  183 00000106         ;
  184 00000106         ;*******************************************************
                       ***********************
  185 00000106         FaultISR
  186 00000106 E7FE            B                FaultISR
  187 00000108         
  188 00000108         ;*******************************************************
                       ***********************
  189 00000108         ;
  190 00000108         ; This is the code that gets called when the processor r
                       eceives an unexpected
  191 00000108         ; interrupt.  This simply enters an infinite loop, prese
                       rving the system state
  192 00000108         ; for examination by a debugger.
  193 00000108         ;
  194 00000108         ;*******************************************************
                       ***********************
  195 00000108         IntDefaultHandler
  196 00000108 E7FE            B                IntDefaultHandler
  197 0000010A         
  198 0000010A         ;*******************************************************
                       ***********************
  199 0000010A         ;
  200 0000010A         ; Make sure the end of this section is aligned.
  201 0000010A         ;
  202 0000010A         ;*******************************************************
                       ***********************
  203 0000010A 00 00           ALIGN
  204 0000010C         
  205 0000010C         ;*******************************************************

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