📄 stm32f10x_tim.h
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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_tim.h
* Author : MCD Application Team
* Version : V2.0
* Date : 05/23/2008
* Description : This file contains all the functions prototypes for the
* TIM firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED
* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_TIM_H
#define __STM32F10x_TIM_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* TIM Time Base Init structure definition */
typedef struct
{
/* Set the Prescaler value */
// TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
u16 TIM_Prescaler; //
u16 TIM_CounterMode; //
/*Set the Autoreload value*/
// TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; // 自动重装载寄存器(TIMx_ARR)
//ARR[15:0]: 自动重装载的值
//ARR是将要装载入实际的自动重装载寄存器的数值。 详细参考13.4.1：时基单元有关ARR的更新和动作。
u16 TIM_Period;
u16 TIM_ClockDivision;
u8 TIM_RepetitionCounter;
} TIM_TimeBaseInitTypeDef;
/* TIM Output Compare Init structure definition */
typedef struct
{
u16 TIM_OCMode;
u16 TIM_OutputState;
u16 TIM_OutputNState;
u16 TIM_Pulse;
u16 TIM_OCPolarity;
u16 TIM_OCNPolarity;
u16 TIM_OCIdleState;
u16 TIM_OCNIdleState;
} TIM_OCInitTypeDef;
/* TIM Input Capture Init structure definition */
typedef struct
{
u16 TIM_Channel;
u16 TIM_ICPolarity;
u16 TIM_ICSelection;
u16 TIM_ICPrescaler;
u16 TIM_ICFilter;
} TIM_ICInitTypeDef;
/* BDTR structure definition */
typedef struct
{
u16 TIM_OSSRState;
u16 TIM_OSSIState;
u16 TIM_LOCKLevel;
u16 TIM_DeadTime;
u16 TIM_Break;
u16 TIM_BreakPolarity;
u16 TIM_AutomaticOutput;
} TIM_BDTRInitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_TIM_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM2_BASE) || \
((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || \
((*(u32*)&(PERIPH)) == TIM5_BASE) || \
((*(u32*)&(PERIPH)) == TIM6_BASE) || \
((*(u32*)&(PERIPH)) == TIM7_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
#define IS_TIM_18_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
#define IS_TIM_123458_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM2_BASE) || \
((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || \
((*(u32*)&(PERIPH)) == TIM5_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
/* TIM Output Compare and PWM modes -----------------------------------------*/
//位6:4 0C1M[2:0]：输出比较1模式
#define TIM_OCMode_Timing ((u16)0x0000) //0x0000 0000 0001(冻结。输出比较寄存器TIMx_CCR1与计数器TIMx_CNT间的比较对OC1REF不起作) 0000
#define TIM_OCMode_Active ((u16)0x0010) //0x0000 0000 0010(匹配时设置通道1 为有效电平。当计数器TIMx_CNT的值与捕获/ 比较寄存器
//1(TIMx_CCR1)相同时，强制OC1REF为高。
#define TIM_OCMode_Inactive ((u16)0x0020) //010 匹配时设置通道1 为有效电平
#define TIM_OCMode_Toggle ((u16)0x0030) //011：翻转。当TIMx_CCR1=TIMx_CNT时，翻转OC1REF的电平。
#define TIM_OCMode_PWM1 ((u16)0x0060) //
#define TIM_OCMode_PWM2 ((u16)0x0070)
#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
((MODE) == TIM_OCMode_Active) || \
((MODE) == TIM_OCMode_Inactive) || \
((MODE) == TIM_OCMode_Toggle)|| \
((MODE) == TIM_OCMode_PWM1) || \
((MODE) == TIM_OCMode_PWM2))
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
((MODE) == TIM_OCMode_Active) || \
((MODE) == TIM_OCMode_Inactive) || \
((MODE) == TIM_OCMode_Toggle)|| \
((MODE) == TIM_OCMode_PWM1) || \
((MODE) == TIM_OCMode_PWM2) || \
((MODE) == TIM_ForcedAction_Active) || \
((MODE) == TIM_ForcedAction_InActive))
/* TIM One Pulse Mode -------------------------------------------------------*/
#define TIM_OPMode_Single ((u16)0x0008)
#define TIM_OPMode_Repetitive ((u16)0x0000)
#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
((MODE) == TIM_OPMode_Repetitive))
/* TIM Channel -------------------------------------------------------------*/
#define TIM_Channel_1 ((u16)0x0000)
#define TIM_Channel_2 ((u16)0x0004)
#define TIM_Channel_3 ((u16)0x0008)
#define TIM_Channel_4 ((u16)0x000C)
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2) || \
((CHANNEL) == TIM_Channel_3) || \
((CHANNEL) == TIM_Channel_4))
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2))
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2) || \
((CHANNEL) == TIM_Channel_3))
/* TIM Clock Division CKD --------------------------------------------------*/
#define TIM_CKD_DIV1 ((u16)0x0000)
#define TIM_CKD_DIV2 ((u16)0x0100)
#define TIM_CKD_DIV4 ((u16)0x0200)
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
((DIV) == TIM_CKD_DIV2) || \
((DIV) == TIM_CKD_DIV4))
/* TIM Counter Mode --------------------------------------------------------*/
#define TIM_CounterMode_Up ((u16)0x0000)
#define TIM_CounterMode_Down ((u16)0x0010)
#define TIM_CounterMode_CenterAligned1 ((u16)0x0020)
#define TIM_CounterMode_CenterAligned2 ((u16)0x0040)
#define TIM_CounterMode_CenterAligned3 ((u16)0x0060)
#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
((MODE) == TIM_CounterMode_Down) || \
((MODE) == TIM_CounterMode_CenterAligned1) || \
((MODE) == TIM_CounterMode_CenterAligned2) || \
((MODE) == TIM_CounterMode_CenterAligned3))
/* TIM Output Compare Polarity ---------------------------------------------*/
#define TIM_OCPolarity_High ((u16)0x0000)
#define TIM_OCPolarity_Low ((u16)0x0002)
#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
((POLARITY) == TIM_OCPolarity_Low))
/* TIM Output Compare N Polarity -------------------------------------------*/
#define TIM_OCNPolarity_High ((u16)0x0000)
#define TIM_OCNPolarity_Low ((u16)0x0008)
#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
((POLARITY) == TIM_OCNPolarity_Low))
/* TIM Output Compare states -----------------------------------------------*/
#define TIM_OutputState_Disable ((u16)0x0000)
#define TIM_OutputState_Enable ((u16)0x0001)
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
((STATE) == TIM_OutputState_Enable))
/* TIM Output Compare N States ---------------------------------------------*/
#define TIM_OutputNState_Disable ((u16)0x0000)
#define TIM_OutputNState_Enable ((u16)0x0004)
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