h.asv

关于LDPC编码的MATLAB实现仿镇,求关于LDPC码的FPGA实现

%之前需要H矩阵重排为近似下三角矩阵;
%N＝20,j=3,k=4
 H =[1     0     1     0     0     0     0     1     1     0     0     0     0     0     0     0     0     0     0     0
     0     0     0     0     1     1     1     0     0     1     0     0     0     0     0     0     0     0     0     0
     1     0     0     1     1     0     0     0     0     0     1     0     0     0     0     0     0     0     0     0
     0     1     0     0     0     0     0     1     0     0     1     1     0     0     0     0     0     0     0     0
     0     1     1     0     0     0     1     0     0     0     0     0     1     0     0     0     0     0     0     0
     1     0     0     0     0     0     0     0     0     0     0     1     1     1     0     0     0     0     0     0
     0     0     0     0     0     0     0     0     1     1     0     1     0     0     1     0     0     0     0     0
     0     0     1     1     0     0     0     0     0     1     0     0     0     0     0     1     0     0     0     0
     0     0     0     0     0     0     1     0     0     0     0     0     0     1     0     1     1     0     0     0
     0     0     0     0     0     0     0     0     0     0     1     0     0     1     1     0     0     1     0     0
     0     1     0     0     0     1     0     0     0     0     0     0     0     0     0     0     0     1     1     0
     0     0     0     0     0     1     0     0     0     0     0     0     0     0     1     0     1     0     0     1
     0     0     0     1     0     0     0     1     0     0     0     0     0     0     0     0     0     0     1     1
     0     0     0     0     0     0     0     0     0     0     0     0     1     0     0     1     0     1     0     1
     0     0     0     0     1     0     0     0     1     0     0     0     0     0     0     0     1     0     1     0];