📄 ps2_study.lis
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.area data(ram, con, rel)
0021 .dbfile D:\my_work\ps2_study\ps2_study.c
0021 .dbsym e rig _rig c
0021 _LR::
0021 .blkb 1
.area idata
0021 00 .byte 0
.area data(ram, con, rel)
0022 .dbfile D:\my_work\ps2_study\ps2_study.c
0022 .dbsym e LR _LR c
0022 _wed1::
0022 .blkb 1
.area idata
0022 01 .byte 1
.area data(ram, con, rel)
0023 .dbfile D:\my_work\ps2_study\ps2_study.c
0023 .dbsym e wed1 _wed1 c
0023 _flag_L_R::
0023 .blkb 1
.area idata
0023 00 .byte 0
.area data(ram, con, rel)
0024 .dbfile D:\my_work\ps2_study\ps2_study.c
0024 .dbsym e flag_L_R _flag_L_R c
0024 _flag_error::
0024 .blkb 1
.area idata
0024 00 .byte 0
.area data(ram, con, rel)
0025 .dbfile D:\my_work\ps2_study\ps2_study.c
0025 .dbsym e flag_error _flag_error c
0025 _flag_over::
0025 .blkb 1
.area idata
0025 00 .byte 0
.area data(ram, con, rel)
0026 .dbfile D:\my_work\ps2_study\ps2_study.c
0026 .dbsym e flag_over _flag_over c
0026 _flag_score::
0026 .blkb 1
.area idata
0026 00 .byte 0
.area data(ram, con, rel)
0027 .dbfile D:\my_work\ps2_study\ps2_study.c
0027 .dbsym e flag_score _flag_score c
0027 _flag_enter::
0027 .blkb 1
.area idata
0027 00 .byte 0
.area data(ram, con, rel)
0028 .dbfile D:\my_work\ps2_study\ps2_study.c
0028 .dbsym e flag_enter _flag_enter c
0028 _flag_time0::
0028 .blkb 1
.area idata
0028 00 .byte 0
.area data(ram, con, rel)
0029 .dbfile D:\my_work\ps2_study\ps2_study.c
0029 .dbsym e flag_time0 _flag_time0 c
0029 _flag_cout::
0029 .blkb 1
.area idata
0029 00 .byte 0
.area data(ram, con, rel)
002A .dbfile D:\my_work\ps2_study\ps2_study.c
002A .dbsym e flag_cout _flag_cout c
002A _flag_ts::
002A .blkb 1
.area idata
002A 00 .byte 0
.area data(ram, con, rel)
002B .dbfile D:\my_work\ps2_study\ps2_study.c
002B .dbsym e flag_ts _flag_ts c
002B _flag_ms::
002B .blkb 2
.area idata
002B 0000 .word 0
.area data(ram, con, rel)
002D .dbfile D:\my_work\ps2_study\ps2_study.c
002D .dbsym e flag_ms _flag_ms i
002D _xc::
002D .blkb 1
.area idata
002D 22 .byte 34
.area data(ram, con, rel)
002E .dbfile D:\my_work\ps2_study\ps2_study.c
002E .dbsym e xc _xc c
002E _data_num::
002E .blkw 1
.area idata
002E 6006 .word _num0
.area data(ram, con, rel)
0030 .dbfile D:\my_work\ps2_study\ps2_study.c
0030 .blkw 1
.area idata
0030 7006 .word _num1
.area data(ram, con, rel)
0032 .dbfile D:\my_work\ps2_study\ps2_study.c
0032 .blkw 1
.area idata
0032 8006 .word _num2
.area data(ram, con, rel)
0034 .dbfile D:\my_work\ps2_study\ps2_study.c
0034 .blkw 1
.area idata
0034 9006 .word _num3
.area data(ram, con, rel)
0036 .dbfile D:\my_work\ps2_study\ps2_study.c
0036 .blkw 1
.area idata
0036 A006 .word _num4
.area data(ram, con, rel)
0038 .dbfile D:\my_work\ps2_study\ps2_study.c
0038 .blkw 1
.area idata
0038 B006 .word _num5
.area data(ram, con, rel)
003A .dbfile D:\my_work\ps2_study\ps2_study.c
003A .blkw 1
.area idata
003A C006 .word _num6
.area data(ram, con, rel)
003C .dbfile D:\my_work\ps2_study\ps2_study.c
003C .blkw 1
.area idata
003C D006 .word _num7
.area data(ram, con, rel)
003E .dbfile D:\my_work\ps2_study\ps2_study.c
003E .blkw 1
.area idata
003E E006 .word _num8
.area data(ram, con, rel)
0040 .dbfile D:\my_work\ps2_study\ps2_study.c
0040 .blkw 1
.area idata
0040 F006 .word _num9
.area data(ram, con, rel)
0042 .dbfile D:\my_work\ps2_study\ps2_study.c
0042 .dbsym e data_num _data_num A[20:10]pc
0042 _num_data::
0042 .blkb 1
.area idata
0042 00 .byte 0
.area data(ram, con, rel)
0043 .dbfile D:\my_work\ps2_study\ps2_study.c
0043 .dbsym e num_data _num_data c
0043 _test_num::
0043 .blkb 1
.area idata
0043 00 .byte 0
.area data(ram, con, rel)
0044 .dbfile D:\my_work\ps2_study\ps2_study.c
0044 .dbsym e test_num _test_num c
0044 _key_ok::
0044 .blkb 1
.area idata
0044 01 .byte 1
.area data(ram, con, rel)
0045 .dbfile D:\my_work\ps2_study\ps2_study.c
0045 .dbsym e key_ok _key_ok c
.area text(rom, con, rel)
0000 .dbfile D:\my_work\ps2_study\ps2_study.c
0000 .dbfunc e LCD_Test _LCD_Test fV
0000 ; L_R -> R20
.even
0000 _LCD_Test::
0000 0E940000 xcall push_gset1
0004 402F mov R20,R16
0006 .dbline -1
0006 .dbline 75
0006 ; #include<iom16v.h>
0006 ; #include <macros.h>
0006 ; #include "ps2_study_data.h"
0006 ;
0006 ; unsigned char data_key[3];
0006 ; unsigned char flag_1=1,flag_del=0,flag_char1=0,key_i=1,flag_a=0,flag_w=0,flag_b=0,flag_c=0,
0006 ; flag_d=0,flag_e=0,flag_f=0,flag_g=0,flag_h=0,flag_i=0,
0006 ; flag_j=0,flag_k=0,flag_l=0,flag_n=0,flag_m=0,flag_o=0,
0006 ; flag_p=0,flag_q=0,flag_r=0,flag_s=0,flag_t=0,flag_u=0,
0006 ; flag_v=0,flag_ww=0,flag_x=0,flag_y=0,flag_z=0,flag_esc=0;
0006 ; unsigned char y_station,rig=0,LR=0,wed1=1,flag_L_R=0,flag_error=0,
0006 ; flag_over=0,flag_rig,flag_score=0,flag_enter=0,flag_time0=0,
0006 ; flag_cout=0,flag_ts=0;
0006 ; signed char x_station;
0006 ; unsigned int flag_ms=0;
0006 ; ////////////////////////////////
0006 ; #define start 34;
0006 ; char extern xc=start;
0006 ; unsigned char const *data_num[10]={&num0[0],&num1[0],&num2[0],&num3[0],
0006 ; &num4[0],&num5[0],&num6[0],&num7[0],&num8[0],&num9[0]};
0006 ;
0006 ; unsigned char num_data=0,test_num=0;
0006 ; unsigned char key_ok=1;
0006 ; ////////////////////////////////
0006 ;
0006 ;
0006 ; #define data_DDR DDRA
0006 ; #define data_OUT PORTA
0006 ; #define data_in PINA
0006 ;
0006 ; #define COMMAND_OUT PORTD
0006 ; #define COMMAND_DDR DDRD
0006 ;
0006 ; #define CS1 PD2
0006 ; #define CS2 PD3
0006 ; #define D_I PD4
0006 ; #define R_W PD5
0006 ; #define E PD6
0006 ;
0006 ; #define COMMAND_INI() COMMAND_DDR|=0X7C
0006 ;
0006 ; #define SET_CS1() COMMAND_OUT |=(1<<CS1)
0006 ; #define SET_CS2() COMMAND_OUT |=(1<<CS2)
0006 ; #define SET_D_I() COMMAND_OUT |=(1<<D_I)
0006 ; #define SET_R_W() COMMAND_OUT |=(1<<R_W)
0006 ; #define SET_E() COMMAND_OUT |=(1<<E)
0006 ;
0006 ; #define CLR_CS1() COMMAND_OUT &=~(1<<CS1)
0006 ; #define CLR_CS2() COMMAND_OUT &=~(1<<CS2)
0006 ; #define CLR_D_I() COMMAND_OUT &=~(1<<D_I)
0006 ; #define CLR_R_W() COMMAND_OUT &=~(1<<R_W)
0006 ; #define CLR_E() COMMAND_OUT &=~(1<<E)
0006 ;
0006 ; #define BUSY 0X80
0006 ; #define LCD_ON 0X3F
0006 ; #define LCD_OFF 0X3E
0006 ; #define DIS_X 0X40
0006 ; #define DIS_Y 0XB8
0006 ; #define MAX_X 0X3F
0006 ; #define MAX_Y 0X07
0006 ;
0006 ; #define LEFT 0X00
0006 ; #define RIGHT 0X01
0006 ;
0006 ; #define page1 0xb8
0006 ; #define page2 0xb9
0006 ; #define page3 0xba
0006 ; #define page4 0xbb
0006 ; #define page5 0xbc
0006 ;
0006 ;
0006 ;
0006 ; ///////////////////////////////////////////////////////////////
0006 ; void LCD_Test(char L_R)
0006 ; {
0006 .dbline 76
0006 ; data_DDR=0x00;
0006 2224 clr R2
0008 2ABA out 0x1a,R2
000A .dbline 77
000A ; if(L_R)
000A 4423 tst R20
000C 19F0 breq L2
000E .dbline 78
000E ; {
000E .dbline 79
000E ; SET_CS1();
000E 929A sbi 0x12,2
0010 .dbline 80
0010 ; CLR_CS2();
0010 9398 cbi 0x12,3
0012 .dbline 81
0012 ; }
0012 02C0 xjmp L3
0014 L2:
0014 .dbline 83
0014 ; else
0014 ; {
0014 .dbline 84
0014 ; SET_CS2();
0014 939A sbi 0x12,3
0016 .dbline 85
0016 ; CLR_CS1();
0016 9298 cbi 0x12,2
0018 .dbline 86
0018 ; }
0018 L3:
0018 .dbline 87
0018 ; CLR_D_I();
0018 9498 cbi 0x12,4
001A .dbline 88
001A ; SET_R_W();
001A 959A sbi 0x12,5
001C .dbline 89
001C ; SET_E();
001C 969A sbi 0x12,6
001E .dbline 90
001E ; Delaynus(2);
001E 02E0 ldi R16,2
0020 10E0 ldi R17,0
0022 BDD0 xcall _Delaynus
0024 L4:
0024 .dbline 92
0024 L5:
0024 .dbline 91
0024 ; while(data_in & BUSY)
0024 CF99 sbic 0x19,7
0026 FECF rjmp L4
0028 .dbline 93
0028 ; ;
0028 ; CLR_E();
0028 9698 cbi 0x12,6
002A .dbline 94
002A ; data_DDR=0XFF;
002A 8FEF ldi R24,255
002C 8ABB out 0x1a,R24
002E .dbline -2
002E .dbline 96
002E ;
002E ; }
002E L1:
002E 0E940000 xcall pop_gset1
0032 .dbline 0 ; func end
0032 0895 ret
0034 .dbsym r L_R 20 c
0034 .dbend
0034 .dbfunc e LCD_write _LCD_write fV
0034 ; L_R -> R22
0034 ; data -> R20
.even
0034 _LCD_write::
0034 0E940000 xcall push_gset2
0038 622F mov R22,R18
003A 402F mov R20,R16
003C .dbline -1
003C .dbline 100
003C ; ///////////////////////////////////////////////////////////////////
003C ;
003C ; void LCD_write (unsigned char data,char L_R)
003C ; {
003C .dbline 101
003C ; LCD_Test(L_R);
003C 062F mov R16,R22
003E E0DF xcall _LCD_Test
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